537     D0 = TRI->getSubReg(Reg, ARM::dsub_0);  in GetDSubRegs()
538     D1 = TRI->getSubReg(Reg, ARM::dsub_1);  in GetDSubRegs()
539     D2 = TRI->getSubReg(Reg, ARM::dsub_2);  in GetDSubRegs()
540     D3 = TRI->getSubReg(Reg, ARM::dsub_3);  in GetDSubRegs()
542     D0 = TRI->getSubReg(Reg, ARM::dsub_4);  in GetDSubRegs()
543     D1 = TRI->getSubReg(Reg, ARM::dsub_5);  in GetDSubRegs()
544     D2 = TRI->getSubReg(Reg, ARM::dsub_6);  in GetDSubRegs()
545     D3 = TRI->getSubReg(Reg, ARM::dsub_7);  in GetDSubRegs()
547     D0 = TRI->getSubReg(Reg, ARM::dsub_3);  in GetDSubRegs()
548     D1 = TRI->getSubReg(Reg, ARM::dsub_4);  in GetDSubRegs()
549     D2 = TRI->getSubReg(Reg, ARM::dsub_5);  in GetDSubRegs()
550     D3 = TRI->getSubReg(Reg, ARM::dsub_6);  in GetDSubRegs()
552     D0 = TRI->getSubReg(Reg, ARM::dsub_0);  in GetDSubRegs()
553     D1 = TRI->getSubReg(Reg, ARM::dsub_2);  in GetDSubRegs()
554     D2 = TRI->getSubReg(Reg, ARM::dsub_4);  in GetDSubRegs()
555     D3 = TRI->getSubReg(Reg, ARM::dsub_6);  in GetDSubRegs()
558     D0 = TRI->getSubReg(Reg, ARM::dsub_1);  in GetDSubRegs()
559     D1 = TRI->getSubReg(Reg, ARM::dsub_3);  in GetDSubRegs()
560     D2 = TRI->getSubReg(Reg, ARM::dsub_5);  in GetDSubRegs()
561     D3 = TRI->getSubReg(Reg, ARM::dsub_7);  in GetDSubRegs()
602     Register SubReg = TRI->getSubReg(DstReg, SubRegIndex);  in ExpandVLD()
908   MIB.addReg(TRI->getSubReg(SrcReg, ARM::dsub_0), Flags);  in ExpandMQQPRLoadStore()
909   MIB.addReg(TRI->getSubReg(SrcReg, ARM::dsub_1), Flags);  in ExpandMQQPRLoadStore()
910   MIB.addReg(TRI->getSubReg(SrcReg, ARM::dsub_2), Flags);  in ExpandMQQPRLoadStore()
911   MIB.addReg(TRI->getSubReg(SrcReg, ARM::dsub_3), Flags);  in ExpandMQQPRLoadStore()
914     MIB.addReg(TRI->getSubReg(SrcReg, ARM::dsub_4), Flags);  in ExpandMQQPRLoadStore()
915     MIB.addReg(TRI->getSubReg(SrcReg, ARM::dsub_5), Flags);  in ExpandMQQPRLoadStore()
916     MIB.addReg(TRI->getSubReg(SrcReg, ARM::dsub_6), Flags);  in ExpandMQQPRLoadStore()
917     MIB.addReg(TRI->getSubReg(SrcReg, ARM::dsub_7), Flags);  in ExpandMQQPRLoadStore()
1435         unsigned SReg0 = TRI->getSubReg(Reg, ARM::ssub_0);  in CMSESaveClearFPRegsV8()
1840     Register RegLo = TRI->getSubReg(Reg.getReg(), ARM::gsub_0);  in addExclusiveRegPair()
1841     Register RegHi = TRI->getSubReg(Reg.getReg(), ARM::gsub_1);  in addExclusiveRegPair()
1866   Register DestLo = TRI->getSubReg(Dest.getReg(), ARM::gsub_0);  in ExpandCMP_SWAP_64()
1867   Register DestHi = TRI->getSubReg(Dest.getReg(), ARM::gsub_1);  in ExpandCMP_SWAP_64()
1868   Register DesiredLo = TRI->getSubReg(DesiredReg, ARM::gsub_0);  in ExpandCMP_SWAP_64()
1869   Register DesiredHi = TRI->getSubReg(DesiredReg, ARM::gsub_1);  in ExpandCMP_SWAP_64()
2687       Register D0 = TRI->getSubReg(DstReg, ARM::dsub_0);  in ExpandMI()
2688       Register D1 = TRI->getSubReg(DstReg, ARM::dsub_1);  in ExpandMI()
2719       Register D0 = TRI->getSubReg(SrcReg, ARM::dsub_0);  in ExpandMI()
2720       Register D1 = TRI->getSubReg(SrcReg, ARM::dsub_1);  in ExpandMI()
3123               .addReg(TRI->getSubReg(PairReg, ARM::gsub_0),  in ExpandMI()
3125               .addReg(TRI->getSubReg(PairReg, ARM::gsub_1),  in ExpandMI()