172   Register TargetLo = TRI->getSubReg(TargetReg, AMDGPU::sub0);  in buildGitPtr()
173   Register TargetHi = TRI->getSubReg(TargetReg, AMDGPU::sub1);  in buildGitPtr()
235     FlatScrInitLo = TRI->getSubReg(FlatScrInit, AMDGPU::sub0);  in emitEntryFunctionFlatScratchInit()
236     FlatScrInitHi = TRI->getSubReg(FlatScrInit, AMDGPU::sub1);  in emitEntryFunctionFlatScratchInit()
274     FlatScrInitLo = TRI->getSubReg(FlatScratchInitReg, AMDGPU::sub0);  in emitEntryFunctionFlatScratchInit()
275     FlatScrInitHi = TRI->getSubReg(FlatScratchInitReg, AMDGPU::sub1);  in emitEntryFunctionFlatScratchInit()
546     Register Rsrc01 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0_sub1);  in emitEntryFunctionScratchRsrcRegSetup()
547     Register Rsrc03 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub3);  in emitEntryFunctionScratchRsrcRegSetup()
587     Register Rsrc2 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub2);  in emitEntryFunctionScratchRsrcRegSetup()
588     Register Rsrc3 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub3);  in emitEntryFunctionScratchRsrcRegSetup()
594       Register Rsrc01 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0_sub1);  in emitEntryFunctionScratchRsrcRegSetup()
622       Register Rsrc0 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0);  in emitEntryFunctionScratchRsrcRegSetup()
623       Register Rsrc1 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub1);  in emitEntryFunctionScratchRsrcRegSetup()
660   Register ScratchRsrcSub0 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0);  in emitEntryFunctionScratchRsrcRegSetup()
661   Register ScratchRsrcSub1 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub1);  in emitEntryFunctionScratchRsrcRegSetup()
1341     SavedRegs.set(TRI->getSubReg(RetAddrReg, AMDGPU::sub0));  in determineCalleeSavesSGPR()
1342     SavedRegs.set(TRI->getSubReg(RetAddrReg, AMDGPU::sub1));  in determineCalleeSavesSGPR()