Lines Matching refs:addReg

40     LiveRegs.addReg(CSRegs[i]);  in findScratchNonCalleeSaveRegister()
138 LiveRegs.addReg(SpillReg); in buildPrologSpill()
178 .addReg(TargetReg, RegState::ImplicitDefine); in buildGitPtr()
187 .addReg(GitPtrLo); in buildGitPtr()
254 .addReg(FlatScrInit) in emitEntryFunctionFlatScratchInit()
262 .addReg(FlatScrInitHi) in emitEntryFunctionFlatScratchInit()
282 .addReg(FlatScrInitLo) in emitEntryFunctionFlatScratchInit()
283 .addReg(ScratchWaveOffsetReg); in emitEntryFunctionFlatScratchInit()
286 .addReg(FlatScrInitHi) in emitEntryFunctionFlatScratchInit()
291 addReg(FlatScrInitLo). in emitEntryFunctionFlatScratchInit()
295 addReg(FlatScrInitHi). in emitEntryFunctionFlatScratchInit()
303 .addReg(FlatScrInitLo) in emitEntryFunctionFlatScratchInit()
304 .addReg(ScratchWaveOffsetReg); in emitEntryFunctionFlatScratchInit()
307 .addReg(FlatScrInitHi) in emitEntryFunctionFlatScratchInit()
318 .addReg(FlatScrInitHi, RegState::Kill); in emitEntryFunctionFlatScratchInit()
323 .addReg(FlatScrInitLo) in emitEntryFunctionFlatScratchInit()
324 .addReg(ScratchWaveOffsetReg); in emitEntryFunctionFlatScratchInit()
329 .addReg(FlatScrInitLo, RegState::Kill) in emitEntryFunctionFlatScratchInit()
487 .addReg(PreloadedScratchWaveOffsetReg, RegState::Kill); in emitEntryFunctionPrologue()
564 .addReg(Rsrc01) in emitEntryFunctionScratchRsrcRegSetup()
567 .addReg(ScratchRsrcReg, RegState::ImplicitDefine) in emitEntryFunctionScratchRsrcRegSetup()
581 .addReg(Rsrc03); in emitEntryFunctionScratchRsrcRegSetup()
600 .addReg(MFI->getImplicitBufferPtrUserSGPR()) in emitEntryFunctionScratchRsrcRegSetup()
601 .addReg(ScratchRsrcReg, RegState::ImplicitDefine); in emitEntryFunctionScratchRsrcRegSetup()
612 .addReg(MFI->getImplicitBufferPtrUserSGPR()) in emitEntryFunctionScratchRsrcRegSetup()
616 .addReg(ScratchRsrcReg, RegState::ImplicitDefine); in emitEntryFunctionScratchRsrcRegSetup()
627 .addReg(ScratchRsrcReg, RegState::ImplicitDefine); in emitEntryFunctionScratchRsrcRegSetup()
631 .addReg(ScratchRsrcReg, RegState::ImplicitDefine); in emitEntryFunctionScratchRsrcRegSetup()
637 .addReg(ScratchRsrcReg, RegState::ImplicitDefine); in emitEntryFunctionScratchRsrcRegSetup()
641 .addReg(ScratchRsrcReg, RegState::ImplicitDefine); in emitEntryFunctionScratchRsrcRegSetup()
647 .addReg(PreloadedScratchRsrcReg, RegState::Kill); in emitEntryFunctionScratchRsrcRegSetup()
666 .addReg(ScratchRsrcSub0) in emitEntryFunctionScratchRsrcRegSetup()
667 .addReg(ScratchWaveOffsetReg) in emitEntryFunctionScratchRsrcRegSetup()
668 .addReg(ScratchRsrcReg, RegState::ImplicitDefine); in emitEntryFunctionScratchRsrcRegSetup()
670 .addReg(ScratchRsrcSub1) in emitEntryFunctionScratchRsrcRegSetup()
672 .addReg(ScratchRsrcReg, RegState::ImplicitDefine); in emitEntryFunctionScratchRsrcRegSetup()
726 LiveRegs.addReg(ScratchExecCopy); in buildScratchExecCopy()
806 .addReg(ScratchExecCopy, RegState::Kill); in emitPrologue()
807 LiveRegs.addReg(ScratchExecCopy); in emitPrologue()
821 .addReg(Reg); in emitPrologue()
836 .addReg(Reg) in emitPrologue()
838 .addReg(Spill[0].VGPR, RegState::Undef); in emitPrologue()
852 .addReg(FramePtrReg) in emitPrologue()
867 .addReg(BasePtrReg) in emitPrologue()
888 LiveRegs.addReg(FuncInfo->SGPRForFPSaveRestoreCopy); in emitPrologue()
889 LiveRegs.addReg(FuncInfo->SGPRForBPSaveRestoreCopy); in emitPrologue()
906 .addReg(StackPtrReg) in emitPrologue()
910 .addReg(FramePtrReg, RegState::Kill) in emitPrologue()
917 .addReg(StackPtrReg) in emitPrologue()
927 .addReg(StackPtrReg) in emitPrologue()
933 .addReg(StackPtrReg) in emitPrologue()
988 .addReg(StackPtrReg) in emitEpilogue()
996 .addReg(FuncInfo->SGPRForFPSaveRestoreCopy) in emitEpilogue()
1002 .addReg(FuncInfo->SGPRForBPSaveRestoreCopy) in emitEpilogue()
1015 .addReg(TmpVGPR, RegState::Kill); in emitEpilogue()
1024 .addReg(Spill[0].VGPR) in emitEpilogue()
1074 .addReg(ScratchExecCopy, RegState::Kill); in emitEpilogue()
1292 LiveRegs.addReg(MFI->SGPRForFPSaveRestoreCopy); in determineCalleeSaves()
1437 .addReg(SPReg) in eliminateCallFramePseudoInstr()