Lines Matching refs:MF
59 static void getVGPRSpillLaneOrTempRegister(MachineFunction &MF, in getVGPRSpillLaneOrTempRegister() argument
64 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in getVGPRSpillLaneOrTempRegister()
65 MachineFrameInfo &FrameInfo = MF.getFrameInfo(); in getVGPRSpillLaneOrTempRegister()
67 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in getVGPRSpillLaneOrTempRegister()
74 if (MFI->haveFreeLanesForSGPRSpill(MF, 1)) { in getVGPRSpillLaneOrTempRegister()
78 if (!MFI->allocateSGPRSpillToVGPR(MF, NewFI)) in getVGPRSpillLaneOrTempRegister()
92 MF.getRegInfo(), LiveRegs, AMDGPU::SReg_32_XM0_XEXECRegClass, true); in getVGPRSpillLaneOrTempRegister()
98 if (TRI->spillSGPRToVGPR() && MFI->allocateSGPRSpillToVGPR(MF, NewFI)) { in getVGPRSpillLaneOrTempRegister()
109 MF.getFrameInfo().RemoveStackObject(NewFI); in getVGPRSpillLaneOrTempRegister()
126 LivePhysRegs &LiveRegs, MachineFunction &MF, in buildPrologSpill() argument
133 MachineFrameInfo &FrameInfo = MF.getFrameInfo(); in buildPrologSpill()
134 MachinePointerInfo PtrInfo = MachinePointerInfo::getFixedStack(MF, FI); in buildPrologSpill()
135 MachineMemOperand *MMO = MF.getMachineMemOperand( in buildPrologSpill()
148 LivePhysRegs &LiveRegs, MachineFunction &MF, in buildEpilogRestore() argument
155 MachineFrameInfo &FrameInfo = MF.getFrameInfo(); in buildEpilogRestore()
156 MachinePointerInfo PtrInfo = MachinePointerInfo::getFixedStack(MF, FI); in buildEpilogRestore()
157 MachineMemOperand *MMO = MF.getMachineMemOperand( in buildEpilogRestore()
168 MachineFunction *MF = MBB.getParent(); in buildGitPtr() local
169 const SIMachineFunctionInfo *MFI = MF->getInfo<SIMachineFunctionInfo>(); in buildGitPtr()
183 Register GitPtrLo = MFI->getGITPtrLoReg(*MF); in buildGitPtr()
184 MF->getRegInfo().addLiveIn(GitPtrLo); in buildGitPtr()
192 MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I, in emitEntryFunctionFlatScratchInit() argument
194 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitEntryFunctionFlatScratchInit()
197 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in emitEntryFunctionFlatScratchInit()
219 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitEntryFunctionFlatScratchInit()
221 ArrayRef<MCPhysReg> AllSGPR64s = TRI->getAllSGPR64(MF); in emitEntryFunctionFlatScratchInit()
225 Register GITPtrLoReg = MFI->getGITPtrLoReg(MF); in emitEntryFunctionFlatScratchInit()
244 auto *MMO = MF.getMachineMemOperand( in emitEntryFunctionFlatScratchInit()
250 MF.getFunction().getCallingConv() == CallingConv::AMDGPU_CS ? 16 : 0; in emitEntryFunctionFlatScratchInit()
251 const GCNSubtarget &Subtarget = MF.getSubtarget<GCNSubtarget>(); in emitEntryFunctionFlatScratchInit()
270 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitEntryFunctionFlatScratchInit()
348 MachineFunction &MF) const { in getEntryFunctionReservedScratchRsrcReg()
350 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in getEntryFunctionReservedScratchRsrcReg()
353 MachineRegisterInfo &MRI = MF.getRegInfo(); in getEntryFunctionReservedScratchRsrcReg()
354 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in getEntryFunctionReservedScratchRsrcReg()
361 allStackObjectsAreDead(MF.getFrameInfo()))) in getEntryFunctionReservedScratchRsrcReg()
365 ScratchRsrcReg != TRI->reservedPrivateSegmentBufferReg(MF)) in getEntryFunctionReservedScratchRsrcReg()
378 ArrayRef<MCPhysReg> AllSGPR128s = TRI->getAllSGPR128(MF); in getEntryFunctionReservedScratchRsrcReg()
383 Register GITPtrLoReg = MFI->getGITPtrLoReg(MF); in getEntryFunctionReservedScratchRsrcReg()
403 void SIFrameLowering::emitEntryFunctionPrologue(MachineFunction &MF, in emitEntryFunctionPrologue() argument
405 assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported"); in emitEntryFunctionPrologue()
418 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in emitEntryFunctionPrologue()
419 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitEntryFunctionPrologue()
422 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitEntryFunctionPrologue()
423 const Function &F = MF.getFunction(); in emitEntryFunctionPrologue()
424 MachineFrameInfo &FrameInfo = MF.getFrameInfo(); in emitEntryFunctionPrologue()
439 ScratchRsrcReg = getEntryFunctionReservedScratchRsrcReg(MF); in emitEntryFunctionPrologue()
443 for (MachineBasicBlock &OtherBB : MF) { in emitEntryFunctionPrologue()
477 ArrayRef<MCPhysReg> AllSGPRs = TRI->getAllSGPR32(MF); in emitEntryFunctionPrologue()
481 Register GITPtrLoReg = MFI->getGITPtrLoReg(MF); in emitEntryFunctionPrologue()
496 if (requiresStackPointerReference(MF)) { in emitEntryFunctionPrologue()
503 if (hasFP(MF)) { in emitEntryFunctionPrologue()
521 emitEntryFunctionFlatScratchInit(MF, MBB, I, DL, ScratchWaveOffsetReg); in emitEntryFunctionPrologue()
525 emitEntryFunctionScratchRsrcRegSetup(MF, MBB, I, DL, in emitEntryFunctionPrologue()
533 MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I, in emitEntryFunctionScratchRsrcRegSetup() argument
537 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitEntryFunctionScratchRsrcRegSetup()
540 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in emitEntryFunctionScratchRsrcRegSetup()
541 const Function &Fn = MF.getFunction(); in emitEntryFunctionScratchRsrcRegSetup()
555 auto MMO = MF.getMachineMemOperand(PtrInfo, in emitEntryFunctionScratchRsrcRegSetup()
561 const GCNSubtarget &Subtarget = MF.getSubtarget<GCNSubtarget>(); in emitEntryFunctionScratchRsrcRegSetup()
596 if (AMDGPU::isCompute(MF.getFunction().getCallingConv())) { in emitEntryFunctionScratchRsrcRegSetup()
606 auto MMO = MF.getMachineMemOperand( in emitEntryFunctionScratchRsrcRegSetup()
618 MF.getRegInfo().addLiveIn(MFI->getImplicitBufferPtrUserSGPR()); in emitEntryFunctionScratchRsrcRegSetup()
691 MachineFunction &MF, MachineBasicBlock &MBB, in initLiveRegs() argument
707 MachineFunction &MF, in buildScratchExecCopy() argument
712 MachineRegisterInfo &MRI = MF.getRegInfo(); in buildScratchExecCopy()
713 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in buildScratchExecCopy()
716 SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>(); in buildScratchExecCopy()
719 initLiveRegs(LiveRegs, TRI, FuncInfo, MF, MBB, MBBI, IsProlog); in buildScratchExecCopy()
739 static bool spilledToMemory(const MachineFunction &MF, int SaveIndex) { in spilledToMemory() argument
740 const MachineFrameInfo &MFI = MF.getFrameInfo(); in spilledToMemory()
744 void SIFrameLowering::emitPrologue(MachineFunction &MF, in emitPrologue() argument
746 SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>(); in emitPrologue()
748 emitEntryFunctionPrologue(MF, MBB); in emitPrologue()
752 MachineFrameInfo &MFI = MF.getFrameInfo(); in emitPrologue()
753 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitPrologue()
754 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitPrologue()
761 TRI.hasBasePointer(MF) ? TRI.getBaseRegister() : Register(); in emitPrologue()
785 ScratchExecCopy = buildScratchExecCopy(LiveRegs, MF, MBB, MBBI, in emitPrologue()
788 buildPrologSpill(ST, TRI, *FuncInfo, LiveRegs, MF, MBB, MBBI, DL, Reg.VGPR, in emitPrologue()
795 buildScratchExecCopy(LiveRegs, MF, MBB, MBBI, /*IsProlog*/ true); in emitPrologue()
797 buildPrologSpill(ST, TRI, *FuncInfo, LiveRegs, MF, MBB, MBBI, DL, in emitPrologue()
813 initLiveRegs(LiveRegs, TRI, FuncInfo, MF, MBB, MBBI, /*IsProlog*/ true); in emitPrologue()
823 buildPrologSpill(ST, TRI, *FuncInfo, LiveRegs, MF, MBB, MBBI, DL, TmpVGPR, in emitPrologue()
842 if (spilledToMemory(MF, *FPSaveIndex)) in emitPrologue()
857 if (spilledToMemory(MF, *BPSaveIndex)) in emitPrologue()
881 for (MachineBasicBlock &MBB : MF) { in emitPrologue()
893 if (TRI.hasStackRealignment(MF)) { in emitPrologue()
915 } else if ((HasFP = hasFP(MF))) { in emitPrologue()
925 if ((HasBP = TRI.hasBasePointer(MF))) { in emitPrologue()
959 void SIFrameLowering::emitEpilogue(MachineFunction &MF, in emitEpilogue() argument
961 const SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>(); in emitEpilogue()
965 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitEpilogue()
967 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitEpilogue()
973 const MachineFrameInfo &MFI = MF.getFrameInfo(); in emitEpilogue()
981 TRI.hasBasePointer(MF) ? TRI.getBaseRegister() : Register(); in emitEpilogue()
986 if (RoundedSize != 0 && hasFP(MF)) { in emitEpilogue()
1007 initLiveRegs(LiveRegs, TRI, FuncInfo, MF, MBB, MBBI, /*IsProlog*/ false); in emitEpilogue()
1012 buildEpilogRestore(ST, TRI, *FuncInfo, LiveRegs, MF, MBB, MBBI, DL, TmpVGPR, in emitEpilogue()
1031 if (spilledToMemory(MF, FramePtrFI)) in emitEpilogue()
1040 if (spilledToMemory(MF, BasePtrFI)) in emitEpilogue()
1054 buildScratchExecCopy(LiveRegs, MF, MBB, MBBI, /*IsProlog*/ false); in emitEpilogue()
1056 buildEpilogRestore(ST, TRI, *FuncInfo, LiveRegs, MF, MBB, MBBI, DL, in emitEpilogue()
1063 buildScratchExecCopy(LiveRegs, MF, MBB, MBBI, /*IsProlog*/ false); in emitEpilogue()
1065 buildEpilogRestore(ST, TRI, *FuncInfo, LiveRegs, MF, MBB, MBBI, DL, in emitEpilogue()
1079 static bool allSGPRSpillsAreDead(const MachineFunction &MF) { in allSGPRSpillsAreDead() argument
1080 const MachineFrameInfo &MFI = MF.getFrameInfo(); in allSGPRSpillsAreDead()
1081 const SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>(); in allSGPRSpillsAreDead()
1096 StackOffset SIFrameLowering::getFrameIndexReference(const MachineFunction &MF, in getFrameIndexReference() argument
1099 const SIRegisterInfo *RI = MF.getSubtarget<GCNSubtarget>().getRegisterInfo(); in getFrameIndexReference()
1101 FrameReg = RI->getFrameRegister(MF); in getFrameIndexReference()
1102 return StackOffset::getFixed(MF.getFrameInfo().getObjectOffset(FI)); in getFrameIndexReference()
1106 MachineFunction &MF, in processFunctionBeforeFrameFinalized() argument
1108 MachineFrameInfo &MFI = MF.getFrameInfo(); in processFunctionBeforeFrameFinalized()
1110 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in processFunctionBeforeFrameFinalized()
1113 MachineRegisterInfo &MRI = MF.getRegInfo(); in processFunctionBeforeFrameFinalized()
1114 SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>(); in processFunctionBeforeFrameFinalized()
1131 for (MachineBasicBlock &MBB : MF) { in processFunctionBeforeFrameFinalized()
1145 if (FuncInfo->allocateVGPRSpillToAGPR(MF, FI, in processFunctionBeforeFrameFinalized()
1166 for (MachineBasicBlock &MBB : MF) { in processFunctionBeforeFrameFinalized()
1194 assert(allSGPRSpillsAreDead(MF) && in processFunctionBeforeFrameFinalized()
1209 allocateScavengingFrameIndexesNearIncomingSP(MF)) { in processFunctionBeforeFrameFinalized()
1216 MachineFunction &MF, RegScavenger *RS) const { in processFunctionBeforeFrameIndicesReplaced() argument
1217 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in processFunctionBeforeFrameIndicesReplaced()
1219 MachineRegisterInfo &MRI = MF.getRegInfo(); in processFunctionBeforeFrameIndicesReplaced()
1220 SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>(); in processFunctionBeforeFrameIndicesReplaced()
1229 TRI->findUnusedRegister(MRI, &AMDGPU::VGPR_32RegClass, MF); in processFunctionBeforeFrameIndicesReplaced()
1236 MRI.freezeReservedRegs(MF); in processFunctionBeforeFrameIndicesReplaced()
1242 void SIFrameLowering::determineCalleeSaves(MachineFunction &MF, in determineCalleeSaves() argument
1245 TargetFrameLowering::determineCalleeSaves(MF, SavedVGPRs, RS); in determineCalleeSaves()
1246 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in determineCalleeSaves()
1250 MachineFrameInfo &FrameInfo = MF.getFrameInfo(); in determineCalleeSaves()
1251 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in determineCalleeSaves()
1283 if (WillHaveFP || hasFP(MF)) { in determineCalleeSaves()
1286 getVGPRSpillLaneOrTempRegister(MF, LiveRegs, MFI->SGPRForFPSaveRestoreCopy, in determineCalleeSaves()
1290 if (TRI->hasBasePointer(MF)) { in determineCalleeSaves()
1296 getVGPRSpillLaneOrTempRegister(MF, LiveRegs, MFI->SGPRForBPSaveRestoreCopy, in determineCalleeSaves()
1301 void SIFrameLowering::determineCalleeSavesSGPR(MachineFunction &MF, in determineCalleeSavesSGPR() argument
1304 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS); in determineCalleeSavesSGPR()
1305 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in determineCalleeSavesSGPR()
1309 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in determineCalleeSavesSGPR()
1323 MachineFrameInfo &FrameInfo = MF.getFrameInfo(); in determineCalleeSavesSGPR()
1328 if (WillHaveFP || hasFP(MF)) in determineCalleeSavesSGPR()
1337 const MachineRegisterInfo &MRI = MF.getRegInfo(); in determineCalleeSavesSGPR()
1338 Register RetAddrReg = TRI->getReturnAddressReg(MF); in determineCalleeSavesSGPR()
1347 MachineFunction &MF, const TargetRegisterInfo *TRI, in assignCalleeSavedSpillSlots() argument
1352 const SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>(); in assignCalleeSavedSpillSlots()
1357 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in assignCalleeSavedSpillSlots()
1385 const MachineFunction &MF) const { in allocateScavengingFrameIndexesNearIncomingSP()
1387 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in allocateScavengingFrameIndexesNearIncomingSP()
1388 const MachineFrameInfo &MFI = MF.getFrameInfo(); in allocateScavengingFrameIndexesNearIncomingSP()
1389 uint64_t EstStackSize = MFI.estimateStackSize(MF); in allocateScavengingFrameIndexesNearIncomingSP()
1413 MachineFunction &MF, in eliminateCallFramePseudoInstr() argument
1420 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in eliminateCallFramePseudoInstr()
1427 if (!hasReservedCallFrame(MF)) { in eliminateCallFramePseudoInstr()
1430 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in eliminateCallFramePseudoInstr()
1461 bool SIFrameLowering::hasFP(const MachineFunction &MF) const { in hasFP()
1462 const MachineFrameInfo &MFI = MF.getFrameInfo(); in hasFP()
1467 !MF.getInfo<SIMachineFunctionInfo>()->isEntryFunction()) { in hasFP()
1477 MF.getSubtarget<GCNSubtarget>().getRegisterInfo()->hasStackRealignment( in hasFP()
1478 MF) || in hasFP()
1479 MF.getTarget().Options.DisableFramePointerElim(MF); in hasFP()
1488 const MachineFunction &MF) const { in requiresStackPointerReference()
1490 assert(MF.getInfo<SIMachineFunctionInfo>()->isEntryFunction() && in requiresStackPointerReference()
1493 const MachineFrameInfo &MFI = MF.getFrameInfo(); in requiresStackPointerReference()