304   Old.substVirtReg(New->getReg(), New->getSubReg(), TRI);  in updateOperand()
498          !Sub->getSubReg() && TII->isFoldableCopy(*SubDef);  in getRegSeqInit()
555   if (!UseOp.getSubReg() && Def && TII->isFoldableCopy(*Def)) {  in tryToFoldACImm()
604     if (UseOp.isImplicit() || UseOp.getSubReg() != AMDGPU::NoSubRegister)  in foldOperand()
622       if (RSUse.getSubReg() != RegSeqDstSubReg)  in foldOperand()
730         !UseMI->getOperand(1).getSubReg()) {  in foldOperand()
735       UseMI->getOperand(1).setSubReg(OpToFold.getSubReg());  in foldOperand()
873         UseMI->getOperand(1).setSubReg(OpToFold.getSubReg());  in foldOperand()
895       if (TRI->hasVectorRegisters(RC) && OpToFold.getSubReg()) {  in foldOperand()
896         unsigned SubReg = OpToFold.getSubReg();  in foldOperand()
921   if (UseOp.getSubReg() && AMDGPU::getRegBitWidth(FoldRC->getID()) == 64) {  in foldOperand()
929     if (UseOp.getSubReg() == AMDGPU::sub0) {  in foldOperand()
932       assert(UseOp.getSubReg() == AMDGPU::sub1);  in foldOperand()
1038     if (Op.getSubReg() != AMDGPU::NoSubRegister || !Op.getReg().isVirtual())  in getImmOrMaterializedImm()
1309         Src0->getSubReg() != Src1->getSubReg() ||  in isClamp()
1310         Src0->getSubReg() != AMDGPU::NoSubRegister)  in isClamp()
1463         Src0->getSubReg() == Src1->getSubReg() &&  in isOMod()
1483       RegOp->getSubReg() != AMDGPU::NoSubRegister ||  in tryFoldOMod()
1534     if (!SubDef || !SubDef->isCopy() || SubDef->getOperand(1).getSubReg())  in tryFoldRegSequence()
1542   while (UseMI->isCopy() && !Op->getSubReg()) {  in tryFoldRegSequence()
1550   if (Op->getSubReg())  in tryFoldRegSequence()
1573       RS.addReg(SubDef->getOperand(1).getReg(), 0, Def->getSubReg());  in tryFoldRegSequence()
1610   if (PHI.getOperand(1).getSubReg() ||  in tryFoldLCSSAPhi()
1624   if (!TRI->isAGPR(*MRI, CopyIn) || Copy->getOperand(1).getSubReg())  in tryFoldLCSSAPhi()