100 INITIALIZE_PASS_BEGIN(AMDGPUDAGToDAGISel, "amdgpu-isel",
109 INITIALIZE_PASS_END(AMDGPUDAGToDAGISel, "amdgpu-isel",  in INITIALIZE_PASS_DEPENDENCY()
116   return new AMDGPUDAGToDAGISel(TM, OptLevel);  in INITIALIZE_PASS_DEPENDENCY()
119 AMDGPUDAGToDAGISel::AMDGPUDAGToDAGISel(  in AMDGPUDAGToDAGISel()  function in AMDGPUDAGToDAGISel
126 bool AMDGPUDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {  in runOnMachineFunction()
139 bool AMDGPUDAGToDAGISel::fp16SrcZerosHighBits(unsigned Opc) const {  in fp16SrcZerosHighBits()
201 void AMDGPUDAGToDAGISel::getAnalysisUsage(AnalysisUsage &AU) const {  in getAnalysisUsage()
211 bool AMDGPUDAGToDAGISel::matchLoadD16FromBuildVector(SDNode *N) const {  in matchLoadD16FromBuildVector()
291 void AMDGPUDAGToDAGISel::PreprocessISelDAG() {  in PreprocessISelDAG()
319 bool AMDGPUDAGToDAGISel::isNoNanSrc(SDValue N) const {  in isNoNanSrc()
330 bool AMDGPUDAGToDAGISel::isInlineImmediate(const SDNode *N,  in isInlineImmediate()
358 const TargetRegisterClass *AMDGPUDAGToDAGISel::getOperandRegClass(SDNode *N,  in getOperandRegClass()
402 SDNode *AMDGPUDAGToDAGISel::glueCopyToOp(SDNode *N, SDValue NewChain,  in glueCopyToOp()
413 SDNode *AMDGPUDAGToDAGISel::glueCopyToM0(SDNode *N, SDValue Val) const {  in glueCopyToM0()
423 SDNode *AMDGPUDAGToDAGISel::glueCopyToM0LDSInit(SDNode *N) const {  in glueCopyToM0LDSInit()
437 MachineSDNode *AMDGPUDAGToDAGISel::buildSMovImm64(SDLoc &DL, uint64_t Imm,  in buildSMovImm64()
453 void AMDGPUDAGToDAGISel::SelectBuildVector(SDNode *N, unsigned RegClassID) {  in SelectBuildVector()
508 void AMDGPUDAGToDAGISel::Select(SDNode *N) {  in Select()
717 bool AMDGPUDAGToDAGISel::isUniformBr(const SDNode *N) const {  in isUniformBr()
724 bool AMDGPUDAGToDAGISel::isUnneededShiftMask(const SDNode *N,  in isUnneededShiftMask()
767 bool AMDGPUDAGToDAGISel::isBaseWithConstantOffset64(SDValue Addr, SDValue &LHS,  in isBaseWithConstantOffset64()
783 StringRef AMDGPUDAGToDAGISel::getPassName() const {  in getPassName()
791 bool AMDGPUDAGToDAGISel::SelectADDRVTX_READ(SDValue Addr, SDValue &Base,  in SelectADDRVTX_READ()
796 bool AMDGPUDAGToDAGISel::SelectADDRIndirect(SDValue Addr, SDValue &Base,  in SelectADDRIndirect()
820 SDValue AMDGPUDAGToDAGISel::getMaterializedScalarImm32(int64_t Val,  in getMaterializedScalarImm32()
829 void AMDGPUDAGToDAGISel::SelectADD_SUB_I64(SDNode *N) {  in SelectADD_SUB_I64()
898 void AMDGPUDAGToDAGISel::SelectAddcSubb(SDNode *N) {  in SelectAddcSubb()
918 void AMDGPUDAGToDAGISel::SelectUADDO_USUBO(SDNode *N) {  in SelectUADDO_USUBO()
951 void AMDGPUDAGToDAGISel::SelectFMA_W_CHAIN(SDNode *N) {  in SelectFMA_W_CHAIN()
972 void AMDGPUDAGToDAGISel::SelectFMUL_W_CHAIN(SDNode *N) {  in SelectFMUL_W_CHAIN()
987 void AMDGPUDAGToDAGISel::SelectDIV_SCALE(SDNode *N) {  in SelectDIV_SCALE()
1007 void AMDGPUDAGToDAGISel::SelectMAD_64_32(SDNode *N) {  in SelectMAD_64_32()
1025 void AMDGPUDAGToDAGISel::SelectMUL_LOHI(SDNode *N) {  in SelectMUL_LOHI()
1054 bool AMDGPUDAGToDAGISel::isDSOffsetLegal(SDValue Base, unsigned Offset) const {  in isDSOffsetLegal()
1067 bool AMDGPUDAGToDAGISel::SelectDS1Addr1Offset(SDValue Addr, SDValue &Base,  in SelectDS1Addr1Offset()
1139 bool AMDGPUDAGToDAGISel::isDSOffset2Legal(SDValue Base, unsigned Offset0,  in isDSOffset2Legal()
1157 bool AMDGPUDAGToDAGISel::SelectDS64Bit4ByteAligned(SDValue Addr, SDValue &Base,  in SelectDS64Bit4ByteAligned()
1163 bool AMDGPUDAGToDAGISel::SelectDS128Bit8ByteAligned(SDValue Addr, SDValue &Base,  in SelectDS128Bit8ByteAligned()
1169 bool AMDGPUDAGToDAGISel::SelectDSReadWrite2(SDValue Addr, SDValue &Base,  in SelectDSReadWrite2()
1249 bool AMDGPUDAGToDAGISel::SelectMUBUF(SDValue Addr, SDValue &Ptr, SDValue &VAddr,  in SelectMUBUF()
1334 bool AMDGPUDAGToDAGISel::SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc,  in SelectMUBUFAddr64()
1361 std::pair<SDValue, SDValue> AMDGPUDAGToDAGISel::foldFrameIndex(SDValue N) const {  in foldFrameIndex()
1375 bool AMDGPUDAGToDAGISel::SelectMUBUFScratchOffen(SDNode *Parent,  in SelectMUBUFScratchOffen()
1448 bool AMDGPUDAGToDAGISel::SelectMUBUFScratchOffset(SDNode *Parent,  in SelectMUBUFScratchOffset()
1491 bool AMDGPUDAGToDAGISel::SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc,  in SelectMUBUFOffset()
1531 bool AMDGPUDAGToDAGISel::SelectFlatOffsetImpl(SDNode *N, SDValue Addr,  in SelectFlatOffsetImpl()
1624 bool AMDGPUDAGToDAGISel::SelectFlatOffset(SDNode *N, SDValue Addr,  in SelectFlatOffset()
1630 bool AMDGPUDAGToDAGISel::SelectGlobalOffset(SDNode *N, SDValue Addr,  in SelectGlobalOffset()
1636 bool AMDGPUDAGToDAGISel::SelectScratchOffset(SDNode *N, SDValue Addr,  in SelectScratchOffset()
1653 bool AMDGPUDAGToDAGISel::SelectGlobalSAddr(SDNode *N,  in SelectGlobalSAddr()
1767 bool AMDGPUDAGToDAGISel::SelectScratchSAddr(SDNode *Parent, SDValue Addr,  in SelectScratchSAddr()
1811 bool AMDGPUDAGToDAGISel::checkFlatScratchSVSSwizzleBug(  in checkFlatScratchSVSSwizzleBug()
1828 bool AMDGPUDAGToDAGISel::SelectScratchSVAddr(SDNode *N, SDValue Addr,  in SelectScratchSVAddr()
1889 bool AMDGPUDAGToDAGISel::SelectSMRDOffset(SDValue Addr, SDValue ByteOffsetNode,  in SelectSMRDOffset()
1943 SDValue AMDGPUDAGToDAGISel::Expand32BitAddress(SDValue Addr) const {  in Expand32BitAddress()
1971 bool AMDGPUDAGToDAGISel::SelectSMRDBaseOffset(SDValue Addr, SDValue &SBase,  in SelectSMRDBaseOffset()
2016 bool AMDGPUDAGToDAGISel::SelectSMRD(SDValue Addr, SDValue &SBase,  in SelectSMRD()
2025 bool AMDGPUDAGToDAGISel::SelectSMRDImm(SDValue Addr, SDValue &SBase,  in SelectSMRDImm()
2030 bool AMDGPUDAGToDAGISel::SelectSMRDImm32(SDValue Addr, SDValue &SBase,  in SelectSMRDImm32()
2037 bool AMDGPUDAGToDAGISel::SelectSMRDSgpr(SDValue Addr, SDValue &SBase,  in SelectSMRDSgpr()
2042 bool AMDGPUDAGToDAGISel::SelectSMRDSgprImm(SDValue Addr, SDValue &SBase,  in SelectSMRDSgprImm()
2048 bool AMDGPUDAGToDAGISel::SelectSMRDBufferImm(SDValue Addr,  in SelectSMRDBufferImm()
2062 bool AMDGPUDAGToDAGISel::SelectSMRDBufferImm32(SDValue Addr,  in SelectSMRDBufferImm32()
2077 bool AMDGPUDAGToDAGISel::SelectMOVRELOffset(SDValue Index,  in SelectMOVRELOffset()
2107 SDNode *AMDGPUDAGToDAGISel::getBFE32(bool IsSigned, const SDLoc &DL,  in getBFE32()
2127 void AMDGPUDAGToDAGISel::SelectS_BFEFromShifts(SDNode *N) {  in SelectS_BFEFromShifts()
2150 void AMDGPUDAGToDAGISel::SelectS_BFE(SDNode *N) {  in SelectS_BFE()
2224 bool AMDGPUDAGToDAGISel::isCBranchSCC(const SDNode *N) const {  in isCBranchSCC()
2250 void AMDGPUDAGToDAGISel::SelectBRCOND(SDNode *N) {  in SelectBRCOND()
2297 void AMDGPUDAGToDAGISel::SelectFMAD_FMA(SDNode *N) {  in SelectFMAD_FMA()
2343 void AMDGPUDAGToDAGISel::SelectDSAppendConsume(SDNode *N, unsigned IntrID) {  in SelectDSAppendConsume()
2402 void AMDGPUDAGToDAGISel::SelectDS_GWS(SDNode *N, unsigned IntrID) {  in SelectDS_GWS()
2467 void AMDGPUDAGToDAGISel::SelectInterpP1F16(SDNode *N) {  in SelectInterpP1F16()
2525 void AMDGPUDAGToDAGISel::SelectINTRINSIC_W_CHAIN(SDNode *N) {  in SelectINTRINSIC_W_CHAIN()
2540 void AMDGPUDAGToDAGISel::SelectINTRINSIC_WO_CHAIN(SDNode *N) {  in SelectINTRINSIC_WO_CHAIN()
2569 void AMDGPUDAGToDAGISel::SelectINTRINSIC_VOID(SDNode *N) {  in SelectINTRINSIC_VOID()
2587 bool AMDGPUDAGToDAGISel::SelectVOP3ModsImpl(SDValue In, SDValue &Src,  in SelectVOP3ModsImpl()
2606 bool AMDGPUDAGToDAGISel::SelectVOP3Mods(SDValue In, SDValue &Src,  in SelectVOP3Mods()
2617 bool AMDGPUDAGToDAGISel::SelectVOP3BMods(SDValue In, SDValue &Src,  in SelectVOP3BMods()
2628 bool AMDGPUDAGToDAGISel::SelectVOP3Mods_NNaN(SDValue In, SDValue &Src,  in SelectVOP3Mods_NNaN()
2634 bool AMDGPUDAGToDAGISel::SelectVOP3NoMods(SDValue In, SDValue &Src) const {  in SelectVOP3NoMods()
2642 bool AMDGPUDAGToDAGISel::SelectVINTERPModsImpl(SDValue In, SDValue &Src,  in SelectVINTERPModsImpl()
2656 bool AMDGPUDAGToDAGISel::SelectVINTERPMods(SDValue In, SDValue &Src,  in SelectVINTERPMods()
2661 bool AMDGPUDAGToDAGISel::SelectVINTERPModsHi(SDValue In, SDValue &Src,  in SelectVINTERPModsHi()
2666 bool AMDGPUDAGToDAGISel::SelectVOP3Mods0(SDValue In, SDValue &Src,  in SelectVOP3Mods0()
2676 bool AMDGPUDAGToDAGISel::SelectVOP3BMods0(SDValue In, SDValue &Src,  in SelectVOP3BMods0()
2686 bool AMDGPUDAGToDAGISel::SelectVOP3OMods(SDValue In, SDValue &Src,  in SelectVOP3OMods()
2697 bool AMDGPUDAGToDAGISel::SelectVOP3PMods(SDValue In, SDValue &Src,  in SelectVOP3PMods()
2796 bool AMDGPUDAGToDAGISel::SelectVOP3PModsDOT(SDValue In, SDValue &Src,  in SelectVOP3PModsDOT()
2801 bool AMDGPUDAGToDAGISel::SelectDotIUVOP3PMods(SDValue In, SDValue &Src) const {  in SelectDotIUVOP3PMods()
2816 bool AMDGPUDAGToDAGISel::SelectWMMAOpSelVOP3PMods(SDValue In,  in SelectWMMAOpSelVOP3PMods()
2830 bool AMDGPUDAGToDAGISel::SelectVOP3OpSel(SDValue In, SDValue &Src,  in SelectVOP3OpSel()
2838 bool AMDGPUDAGToDAGISel::SelectVOP3OpSelMods(SDValue In, SDValue &Src,  in SelectVOP3OpSelMods()
2846 bool AMDGPUDAGToDAGISel::SelectVOP3PMadMixModsImpl(SDValue In, SDValue &Src,  in SelectVOP3PMadMixModsImpl()
2887 bool AMDGPUDAGToDAGISel::SelectVOP3PMadMixMods(SDValue In, SDValue &Src,  in SelectVOP3PMadMixMods()
2895 SDValue AMDGPUDAGToDAGISel::getHi16Elt(SDValue In) const {  in getHi16Elt()
2917 bool AMDGPUDAGToDAGISel::isVGPRImm(const SDNode * N) const {  in isVGPRImm()
2965 bool AMDGPUDAGToDAGISel::isUniformLoad(const SDNode * N) const {  in isUniformLoad()
2979 void AMDGPUDAGToDAGISel::PostprocessISelDAG() {  in PostprocessISelDAG()