Lines Matching refs:VT
203 EVT VT = getOptimalMemOpType(Op, FuncAttributes); in findOptimalMemOpLowering() local
205 if (VT == MVT::Other) { in findOptimalMemOpLowering()
209 VT = MVT::i64; in findOptimalMemOpLowering()
211 while (Op.getDstAlign() < (VT.getSizeInBits() / 8) && in findOptimalMemOpLowering()
212 !allowsMisalignedMemoryAccesses(VT, DstAS, Op.getDstAlign())) in findOptimalMemOpLowering()
213 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); in findOptimalMemOpLowering()
214 assert(VT.isInteger()); in findOptimalMemOpLowering()
224 if (VT.bitsGT(LVT)) in findOptimalMemOpLowering()
225 VT = LVT; in findOptimalMemOpLowering()
231 unsigned VTSize = VT.getSizeInBits() / 8; in findOptimalMemOpLowering()
234 EVT NewVT = VT; in findOptimalMemOpLowering()
238 if (VT.isVector() || VT.isFloatingPoint()) { in findOptimalMemOpLowering()
239 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32; in findOptimalMemOpLowering()
266 VT, DstAS, Op.isFixedDstAlign() ? Op.getDstAlign() : Align(1), in findOptimalMemOpLowering()
271 VT = NewVT; in findOptimalMemOpLowering()
279 MemOps.push_back(VT); in findOptimalMemOpLowering()
288 void TargetLowering::softenSetCCOperands(SelectionDAG &DAG, EVT VT, in softenSetCCOperands() argument
294 return softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, dl, OldLHS, in softenSetCCOperands()
298 void TargetLowering::softenSetCCOperands(SelectionDAG &DAG, EVT VT, in softenSetCCOperands() argument
309 assert((VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128 || VT == MVT::ppcf128) in softenSetCCOperands()
318 LC1 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : in softenSetCCOperands()
319 (VT == MVT::f64) ? RTLIB::OEQ_F64 : in softenSetCCOperands()
320 (VT == MVT::f128) ? RTLIB::OEQ_F128 : RTLIB::OEQ_PPCF128; in softenSetCCOperands()
324 LC1 = (VT == MVT::f32) ? RTLIB::UNE_F32 : in softenSetCCOperands()
325 (VT == MVT::f64) ? RTLIB::UNE_F64 : in softenSetCCOperands()
326 (VT == MVT::f128) ? RTLIB::UNE_F128 : RTLIB::UNE_PPCF128; in softenSetCCOperands()
330 LC1 = (VT == MVT::f32) ? RTLIB::OGE_F32 : in softenSetCCOperands()
331 (VT == MVT::f64) ? RTLIB::OGE_F64 : in softenSetCCOperands()
332 (VT == MVT::f128) ? RTLIB::OGE_F128 : RTLIB::OGE_PPCF128; in softenSetCCOperands()
336 LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : in softenSetCCOperands()
337 (VT == MVT::f64) ? RTLIB::OLT_F64 : in softenSetCCOperands()
338 (VT == MVT::f128) ? RTLIB::OLT_F128 : RTLIB::OLT_PPCF128; in softenSetCCOperands()
342 LC1 = (VT == MVT::f32) ? RTLIB::OLE_F32 : in softenSetCCOperands()
343 (VT == MVT::f64) ? RTLIB::OLE_F64 : in softenSetCCOperands()
344 (VT == MVT::f128) ? RTLIB::OLE_F128 : RTLIB::OLE_PPCF128; in softenSetCCOperands()
348 LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 : in softenSetCCOperands()
349 (VT == MVT::f64) ? RTLIB::OGT_F64 : in softenSetCCOperands()
350 (VT == MVT::f128) ? RTLIB::OGT_F128 : RTLIB::OGT_PPCF128; in softenSetCCOperands()
356 LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : in softenSetCCOperands()
357 (VT == MVT::f64) ? RTLIB::UO_F64 : in softenSetCCOperands()
358 (VT == MVT::f128) ? RTLIB::UO_F128 : RTLIB::UO_PPCF128; in softenSetCCOperands()
365 LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : in softenSetCCOperands()
366 (VT == MVT::f64) ? RTLIB::UO_F64 : in softenSetCCOperands()
367 (VT == MVT::f128) ? RTLIB::UO_F128 : RTLIB::UO_PPCF128; in softenSetCCOperands()
368 LC2 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : in softenSetCCOperands()
369 (VT == MVT::f64) ? RTLIB::OEQ_F64 : in softenSetCCOperands()
370 (VT == MVT::f128) ? RTLIB::OEQ_F128 : RTLIB::OEQ_PPCF128; in softenSetCCOperands()
377 LC1 = (VT == MVT::f32) ? RTLIB::OGE_F32 : in softenSetCCOperands()
378 (VT == MVT::f64) ? RTLIB::OGE_F64 : in softenSetCCOperands()
379 (VT == MVT::f128) ? RTLIB::OGE_F128 : RTLIB::OGE_PPCF128; in softenSetCCOperands()
382 LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 : in softenSetCCOperands()
383 (VT == MVT::f64) ? RTLIB::OGT_F64 : in softenSetCCOperands()
384 (VT == MVT::f128) ? RTLIB::OGT_F128 : RTLIB::OGT_PPCF128; in softenSetCCOperands()
387 LC1 = (VT == MVT::f32) ? RTLIB::OLE_F32 : in softenSetCCOperands()
388 (VT == MVT::f64) ? RTLIB::OLE_F64 : in softenSetCCOperands()
389 (VT == MVT::f128) ? RTLIB::OLE_F128 : RTLIB::OLE_PPCF128; in softenSetCCOperands()
392 LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : in softenSetCCOperands()
393 (VT == MVT::f64) ? RTLIB::OLT_F64 : in softenSetCCOperands()
394 (VT == MVT::f128) ? RTLIB::OLT_F128 : RTLIB::OLT_PPCF128; in softenSetCCOperands()
527 EVT VT = Op.getValueType(); in ShrinkDemandedConstant() local
528 SDValue NewC = TLO.DAG.getConstant(DemandedBits & C, DL, VT); in ShrinkDemandedConstant()
529 SDValue NewOp = TLO.DAG.getNode(Opcode, DL, VT, Op.getOperand(0), NewC); in ShrinkDemandedConstant()
543 EVT VT = Op.getValueType(); in ShrinkDemandedConstant() local
544 APInt DemandedElts = VT.isVector() in ShrinkDemandedConstant()
545 ? APInt::getAllOnes(VT.getVectorNumElements()) in ShrinkDemandedConstant()
634 EVT VT = Op.getValueType(); in SimplifyDemandedBits() local
639 if (VT.isScalableVector()) { in SimplifyDemandedBits()
645 APInt DemandedElts = VT.isVector() in SimplifyDemandedBits()
646 ? APInt::getAllOnes(VT.getVectorNumElements()) in SimplifyDemandedBits()
657 EVT VT = Op.getValueType(); in SimplifyMultipleUseDemandedBits() local
662 if (VT.isScalableVector()) in SimplifyMultipleUseDemandedBits()
675 return DAG.getUNDEF(VT); in SimplifyMultipleUseDemandedBits()
904 EVT VT = Op.getValueType(); in SimplifyMultipleUseDemandedBits() local
909 if (VT.isScalableVector()) in SimplifyMultipleUseDemandedBits()
912 APInt DemandedElts = VT.isVector() in SimplifyMultipleUseDemandedBits()
913 ? APInt::getAllOnes(VT.getVectorNumElements()) in SimplifyMultipleUseDemandedBits()
1036 EVT VT = Op.getValueType(); in combineShiftToAVG() local
1038 std::max<unsigned>(VT.getScalarSizeInBits() - KnownBits, 8); in combineShiftToAVG()
1040 if (VT.isVector()) in combineShiftToAVG()
1041 NVT = EVT::getVectorVT(*DAG.getContext(), NVT, VT.getVectorElementCount()); in combineShiftToAVG()
1049 return DAG.getNode(IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, DL, VT, in combineShiftToAVG()
1074 EVT VT = Op.getValueType(); in SimplifyDemandedBits() local
1075 if (VT.isScalableVector()) in SimplifyDemandedBits()
1080 assert((!VT.isVector() || NumElts == VT.getVectorNumElements()) && in SimplifyDemandedBits()
1119 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); in SimplifyDemandedBits()
1131 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); in SimplifyDemandedBits()
1238 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, NewSrc, NewSub, in SimplifyDemandedBits()
1263 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, DemandedSrc, in SimplifyDemandedBits()
1339 SDValue NewOp = TLO.DAG.getVectorShuffle(VT, dl, Op0, Op1, ShuffleMask); in SimplifyDemandedBits()
1374 SDValue Xor = TLO.DAG.getNode(ISD::XOR, dl, VT, Op0.getOperand(0), Op1); in SimplifyDemandedBits()
1394 TLO.DAG.getNode(ISD::AND, dl, VT, Op0.getOperand(0), Op1); in SimplifyDemandedBits()
1396 TLO.DAG.getNode(ISD::INSERT_SUBVECTOR, dl, VT, NewAnd, in SimplifyDemandedBits()
1419 return TLO.CombineTo(Op, TLO.DAG.getConstant(0, dl, VT)); in SimplifyDemandedBits()
1437 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, Op0, Op1); in SimplifyDemandedBits()
1480 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, Op0, Op1); in SimplifyDemandedBits()
1499 if (SDValue C12 = TLO.DAG.FoldConstantArithmetic(ISD::OR, dl, VT, in SimplifyDemandedBits()
1501 SDValue MaskX = TLO.DAG.getNode(ISD::AND, dl, VT, X, C12); in SimplifyDemandedBits()
1502 SDValue MaskY = TLO.DAG.getNode(ISD::AND, dl, VT, Y, C2); in SimplifyDemandedBits()
1504 Op, TLO.DAG.getNode(ISD::OR, dl, VT, MaskX, MaskY)); in SimplifyDemandedBits()
1542 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::OR, dl, VT, Op0, Op1)); in SimplifyDemandedBits()
1553 TLO.DAG.getConstant(~C->getAPIntValue() & DemandedBits, dl, VT); in SimplifyDemandedBits()
1554 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::AND, dl, VT, Op0, ANDC)); in SimplifyDemandedBits()
1562 SDValue New = TLO.DAG.getNOT(dl, Op0, VT); in SimplifyDemandedBits()
1584 SDValue Not = TLO.DAG.getNOT(dl, Op0.getOperand(0), VT); in SimplifyDemandedBits()
1585 return TLO.CombineTo(Op, TLO.DAG.getNode(Op0Opcode, dl, VT, Not, in SimplifyDemandedBits()
1607 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, Op0, Op1); in SimplifyDemandedBits()
1718 Op, TLO.DAG.getNode(Opc, dl, VT, Op0.getOperand(0), NewSA)); in SimplifyDemandedBits()
1739 Op, TLO.DAG.getNode(ISD::ANY_EXTEND, dl, VT, NarrowShl)); in SimplifyDemandedBits()
1759 SDValue NewExt = TLO.DAG.getNode(ISD::ANY_EXTEND, dl, VT, in SimplifyDemandedBits()
1762 Op, TLO.DAG.getNode(ISD::SHL, dl, VT, NewExt, NewSA)); in SimplifyDemandedBits()
1783 SDValue NewOp = TLO.DAG.getNode(ISD::SHL, dl, VT, DemandedOp0, Op1); in SimplifyDemandedBits()
1861 Op, TLO.DAG.getNode(Opc, dl, VT, Op0.getOperand(0), NewSA)); in SimplifyDemandedBits()
1902 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl, VT, Op0, Op1)); in SimplifyDemandedBits()
1941 Op, TLO.DAG.getNode(ISD::SRL, dl, VT, Op0, Op1, Flags)); in SimplifyDemandedBits()
1948 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl, VT, Op0, NewSA)); in SimplifyDemandedBits()
1960 SDValue NewOp = TLO.DAG.getNode(ISD::SRA, dl, VT, DemandedOp0, Op1); in SimplifyDemandedBits()
2014 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, DemandedOp0, in SimplifyDemandedBits()
2056 if ((!TLO.LegalOperations() || isOperationLegal(ISD::SHL, VT)) && in SimplifyDemandedBits()
2059 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SHL, dl, VT, Op0, Op1)); in SimplifyDemandedBits()
2061 if ((!TLO.LegalOperations() || isOperationLegal(ISD::SRL, VT)) && in SimplifyDemandedBits()
2064 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl, VT, Op0, Op1)); in SimplifyDemandedBits()
2131 if (!TLO.LegalOperations() || isOperationLegal(ShiftOpcode, VT)) { in SimplifyDemandedBits()
2132 EVT ShiftAmtTy = getShiftAmountTy(VT, DL); in SimplifyDemandedBits()
2135 SDValue NewOp = TLO.DAG.getNode(ShiftOpcode, dl, VT, Src, ShAmt); in SimplifyDemandedBits()
2152 if (DemandedBits.isOne() && !TLO.LegalOps && !VT.isVector()) in SimplifyDemandedBits()
2153 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::PARITY, dl, VT, in SimplifyDemandedBits()
2175 getShiftAmountTy(VT, DL)); in SimplifyDemandedBits()
2177 TLO.DAG.getNode(ISD::SHL, dl, VT, Op0, ShiftAmt)); in SimplifyDemandedBits()
2248 VT.getSizeInBits() == SrcVT.getSizeInBits()) in SimplifyDemandedBits()
2249 return TLO.CombineTo(Op, TLO.DAG.getBitcast(VT, Src)); in SimplifyDemandedBits()
2253 if (!TLO.LegalOperations() || isOperationLegal(Opc, VT)) in SimplifyDemandedBits()
2254 return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, dl, VT, Src)); in SimplifyDemandedBits()
2269 return TLO.CombineTo(Op, TLO.DAG.getNode(Op.getOpcode(), dl, VT, NewSrc)); in SimplifyDemandedBits()
2285 VT.getSizeInBits() == SrcVT.getSizeInBits()) in SimplifyDemandedBits()
2286 return TLO.CombineTo(Op, TLO.DAG.getBitcast(VT, Src)); in SimplifyDemandedBits()
2290 if (!TLO.LegalOperations() || isOperationLegal(Opc, VT)) in SimplifyDemandedBits()
2291 return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, dl, VT, Src)); in SimplifyDemandedBits()
2314 if (!TLO.LegalOperations() || isOperationLegal(Opc, VT)) in SimplifyDemandedBits()
2315 return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, dl, VT, Src)); in SimplifyDemandedBits()
2321 return TLO.CombineTo(Op, TLO.DAG.getNode(Op.getOpcode(), dl, VT, NewSrc)); in SimplifyDemandedBits()
2335 VT.getSizeInBits() == SrcVT.getSizeInBits()) in SimplifyDemandedBits()
2336 return TLO.CombineTo(Op, TLO.DAG.getBitcast(VT, Src)); in SimplifyDemandedBits()
2350 return TLO.CombineTo(Op, TLO.DAG.getNode(Op.getOpcode(), dl, VT, NewSrc)); in SimplifyDemandedBits()
2368 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::TRUNCATE, dl, VT, NewSrc)); in SimplifyDemandedBits()
2379 if (TLO.LegalTypes() && !isTypeDesirableForOp(ISD::SRL, VT)) in SimplifyDemandedBits()
2399 ShVal, dl, getShiftAmountTy(VT, DL, TLO.LegalTypes())); in SimplifyDemandedBits()
2401 TLO.DAG.getNode(ISD::TRUNCATE, dl, VT, Src.getOperand(0)); in SimplifyDemandedBits()
2403 Op, TLO.DAG.getNode(ISD::SRL, dl, VT, NewTrunc, NewShAmt)); in SimplifyDemandedBits()
2456 TLO.DAG.getNode(Op.getOpcode(), dl, VT, DemandedSrc, Idx); in SimplifyDemandedBits()
2473 if (!TLO.LegalOperations() && !VT.isVector() && !SrcVT.isVector() && in SimplifyDemandedBits()
2476 bool OpVTLegal = isOperationLegalOrCustom(ISD::FGETSIGN, VT); in SimplifyDemandedBits()
2478 if ((OpVTLegal || i32Legal) && VT.isSimple() && SrcVT != MVT::f16 && in SimplifyDemandedBits()
2481 EVT Ty = OpVTLegal ? VT : MVT::i32; in SimplifyDemandedBits()
2487 Sign = TLO.DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Sign); in SimplifyDemandedBits()
2489 SDValue ShAmt = TLO.DAG.getConstant(ShVal, dl, VT); in SimplifyDemandedBits()
2491 TLO.DAG.getNode(ISD::SHL, dl, VT, Sign, ShAmt)); in SimplifyDemandedBits()
2565 EVT ShiftAmtTy = getShiftAmountTy(VT, TLO.DAG.getDataLayout()); in SimplifyDemandedBits()
2567 SDValue Shl = TLO.DAG.getNode(ISD::SHL, dl, VT, Op.getOperand(0), AmtC); in SimplifyDemandedBits()
2575 SDValue One = TLO.DAG.getConstant(1, dl, VT); in SimplifyDemandedBits()
2576 SDValue And1 = TLO.DAG.getNode(ISD::AND, dl, VT, Op.getOperand(0), One); in SimplifyDemandedBits()
2616 TLO.DAG.getNode(Op.getOpcode(), dl, VT, Op0, Op1, Flags); in SimplifyDemandedBits()
2630 SDValue Neg1 = TLO.DAG.getAllOnesConstant(dl, VT); in SimplifyDemandedBits()
2635 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, Op0, Neg1, Flags); in SimplifyDemandedBits()
2659 EVT ShiftAmtTy = getShiftAmountTy(VT, TLO.DAG.getDataLayout()); in SimplifyDemandedBits()
2661 SDValue Shl = TLO.DAG.getNode(ISD::SHL, dl, VT, X, ShlAmtC); in SimplifyDemandedBits()
2662 SDValue Res = TLO.DAG.getNode(NT, dl, VT, Y, Shl); in SimplifyDemandedBits()
2666 if (isOperationLegalOrCustom(ISD::SHL, VT)) { in SimplifyDemandedBits()
2709 if (VT.isInteger()) in SimplifyDemandedBits()
2710 return TLO.CombineTo(Op, TLO.DAG.getConstant(Known.One, dl, VT)); in SimplifyDemandedBits()
2711 if (VT.isFloatingPoint()) in SimplifyDemandedBits()
2715 APFloat(TLO.DAG.EVTToAPFloatSemantics(VT), Known.One), dl, VT)); in SimplifyDemandedBits()
2744 EVT VT = BO.getValueType(); in getKnownUndefForVectorBinop() local
2745 assert(DAG.getTargetLoweringInfo().isBinOp(BO.getOpcode()) && VT.isVector() && in getKnownUndefForVectorBinop()
2748 EVT EltVT = VT.getVectorElementType(); in getKnownUndefForVectorBinop()
2749 unsigned NumElts = VT.getVectorNumElements(); in getKnownUndefForVectorBinop()
2791 EVT VT = Op.getValueType(); in SimplifyDemandedVectorElts() local
2795 assert(VT.isVector() && "Expected vector op"); in SimplifyDemandedVectorElts()
2804 if (VT.isScalableVector()) in SimplifyDemandedVectorElts()
2807 assert(VT.getVectorNumElements() == NumElts && in SimplifyDemandedVectorElts()
2823 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); in SimplifyDemandedVectorElts()
2831 unsigned EltSizeInBits = VT.getScalarSizeInBits(); in SimplifyDemandedVectorElts()
2843 Opcode, SDLoc(Op), VT, NewOp0 ? NewOp0 : Op0, NewOp1 ? NewOp1 : Op1); in SimplifyDemandedVectorElts()
2853 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); in SimplifyDemandedVectorElts()
2989 return TLO.CombineTo(Op, TLO.DAG.getBuildVector(VT, DL, Ops)); in SimplifyDemandedVectorElts()
3032 TLO.DAG.getNode(Op.getOpcode(), SDLoc(Op), VT, DemandedSubOps); in SimplifyDemandedVectorElts()
3056 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::INSERT_SUBVECTOR, DL, VT, in SimplifyDemandedVectorElts()
3057 TLO.DAG.getUNDEF(VT), Sub, in SimplifyDemandedVectorElts()
3075 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), SDLoc(Op), VT, NewSrc, in SimplifyDemandedVectorElts()
3103 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), SDLoc(Op), VT, NewSrc, in SimplifyDemandedVectorElts()
3226 buildLegalVectorShuffle(VT, DL, Op.getOperand(0), Op.getOperand(1), in SimplifyDemandedVectorElts()
3268 return TLO.CombineTo(Op, TLO.DAG.getBitcast(VT, Src)); in SimplifyDemandedVectorElts()
3274 return TLO.CombineTo(Op, TLO.DAG.getConstant(0, SDLoc(Op), VT)); in SimplifyDemandedVectorElts()
3292 return TLO.CombineTo(Op, TLO.DAG.getBitcast(VT, Fold)); in SimplifyDemandedVectorElts()
3386 return TLO.CombineTo(Op, TLO.DAG.getConstant(0, SDLoc(Op), VT)); in SimplifyDemandedVectorElts()
3412 return TLO.CombineTo(Op, TLO.DAG.getConstant(0, SDLoc(Op), VT)); in SimplifyDemandedVectorElts()
3436 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(VT)); in SimplifyDemandedVectorElts()
3536 TargetLowering::buildLegalVectorShuffle(EVT VT, const SDLoc &DL, SDValue N0, in buildLegalVectorShuffle() argument
3539 bool LegalMask = isShuffleMaskLegal(Mask, VT); in buildLegalVectorShuffle()
3543 LegalMask = isShuffleMaskLegal(Mask, VT); in buildLegalVectorShuffle()
3549 return DAG.getVectorShuffle(VT, DL, N0, N1, Mask); in buildLegalVectorShuffle()
3652 bool TargetLowering::isExtendedTrueVal(const ConstantSDNode *N, EVT VT, in isExtendedTrueVal() argument
3654 if (VT == MVT::i1) in isExtendedTrueVal()
3657 TargetLowering::BooleanContent Cnt = getBooleanContents(VT); in isExtendedTrueVal()
3672 SDValue TargetLowering::foldSetCCWithAnd(EVT VT, SDValue N0, SDValue N1, in foldSetCCWithAnd() argument
3692 return DAG.getBoolExtOrTrunc(N0, DL, VT, OpVT); in foldSetCCWithAnd()
3719 return DAG.getSetCC(DL, VT, N0, Zero, Cond); in foldSetCCWithAnd()
3736 return DAG.getSetCC(DL, VT, NewAnd, Zero, Cond); in foldSetCCWithAnd()
3901 EVT VT = X.getValueType(); in optimizeSetCCByHoistingAndByConstFromLogicalShift() local
3905 SDValue T0 = DAG.getNode(NewShiftOpcode, DL, VT, X, Y); in optimizeSetCCByHoistingAndByConstFromLogicalShift()
3906 SDValue T1 = DAG.getNode(ISD::AND, DL, VT, T0, C); in optimizeSetCCByHoistingAndByConstFromLogicalShift()
3914 SDValue TargetLowering::foldSetCCWithBinOp(EVT VT, SDValue N0, SDValue N1, in foldSetCCWithBinOp() argument
3930 return DAG.getSetCC(DL, VT, Y, DAG.getConstant(0, DL, OpVT), Cond); in foldSetCCWithBinOp()
3938 return DAG.getSetCC(DL, VT, X, DAG.getConstant(0, DL, OpVT), Cond); in foldSetCCWithBinOp()
3951 return DAG.getSetCC(DL, VT, X, YShl1, Cond); in foldSetCCWithBinOp()
3954 static SDValue simplifySetCCWithCTPOP(const TargetLowering &TLI, EVT VT, in simplifySetCCWithCTPOP() argument
3961 if (N0.getOpcode() == ISD::TRUNCATE && N0.hasOneUse() && !VT.isVector() && in simplifySetCCWithCTPOP()
3973 if (VT.isVector() && TLI.isOperationLegal(ISD::CTPOP, CTVT)) in simplifySetCCWithCTPOP()
3994 return DAG.getSetCC(dl, VT, Result, DAG.getConstant(0, dl, CTVT), CC); in simplifySetCCWithCTPOP()
4000 if (!VT.isVector() && TLI.isOperationLegalOrCustom(ISD::CTPOP, CTVT)) in simplifySetCCWithCTPOP()
4013 SDValue LHS = DAG.getSetCC(dl, VT, CTOp, Zero, InvCond); in simplifySetCCWithCTPOP()
4014 SDValue RHS = DAG.getSetCC(dl, VT, And, Zero, Cond); in simplifySetCCWithCTPOP()
4016 return DAG.getNode(LogicOpcode, dl, VT, LHS, RHS); in simplifySetCCWithCTPOP()
4022 static SDValue foldSetCCWithRotate(EVT VT, SDValue N0, SDValue N1, in foldSetCCWithRotate() argument
4042 return DAG.getSetCC(dl, VT, R, N1, Cond); in foldSetCCWithRotate()
4054 return DAG.getSetCC(dl, VT, NewOr, N1, Cond); in foldSetCCWithRotate()
4058 return DAG.getSetCC(dl, VT, NewOr, N1, Cond); in foldSetCCWithRotate()
4065 static SDValue foldSetCCWithFunnelShift(EVT VT, SDValue N0, SDValue N1, in foldSetCCWithFunnelShift() argument
4118 return DAG.getSetCC(dl, VT, NewOr, N1, Cond); in foldSetCCWithFunnelShift()
4125 return DAG.getSetCC(dl, VT, NewOr, N1, Cond); in foldSetCCWithFunnelShift()
4133 SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1, in SimplifySetCC() argument
4142 if (SDValue Fold = DAG.FoldSetCC(VT, N0, N1, Cond, dl)) in SimplifySetCC()
4158 return DAG.getSetCC(dl, VT, N1, N0, SwappedCC); in SimplifySetCC()
4169 return DAG.getSetCC(dl, VT, N1, N0, SwappedCC); in SimplifySetCC()
4171 if (SDValue V = foldSetCCWithRotate(VT, N0, N1, Cond, dl, DAG)) in SimplifySetCC()
4174 if (SDValue V = foldSetCCWithFunnelShift(VT, N0, N1, Cond, dl, DAG)) in SimplifySetCC()
4181 if (SDValue V = simplifySetCCWithCTPOP(*this, VT, N0, C1, Cond, dl, DAG)) in SimplifySetCC()
4203 return DAG.getSetCC(dl, VT, N0.getOperand(0).getOperand(0), Zero, in SimplifySetCC()
4262 return DAG.getSetCC(dl, VT, Trunc, DAG.getConstant(0, dl, MVT::i1), in SimplifySetCC()
4265 return DAG.getSetCC(dl, VT, Trunc, C, Cond); in SimplifySetCC()
4279 if (TopSetCC.getValueType() == MVT::i1 && VT == MVT::i1 && in SimplifySetCC()
4294 return DAG.getSetCC(dl, VT, TopSetCC.getOperand(0), in SimplifySetCC()
4350 return DAG.getSetCC(dl, VT, in SimplifySetCC()
4371 return DAG.getConstant(0, dl, VT); in SimplifySetCC()
4375 return DAG.getConstant(1, dl, VT); in SimplifySetCC()
4379 return DAG.getConstant(C1.isNegative(), dl, VT); in SimplifySetCC()
4383 return DAG.getConstant(C1.isNonNegative(), dl, VT); in SimplifySetCC()
4406 return DAG.getBoolExtOrTrunc(NewSetCC, dl, VT, N0.getValueType()); in SimplifySetCC()
4425 return DAG.getBoolConstant(Cond == ISD::SETNE, dl, VT, OpVT); in SimplifySetCC()
4435 return DAG.getSetCC(dl, VT, ZextOp, in SimplifySetCC()
4441 isTypeLegal(VT) && VT.bitsLE(N0.getValueType()) && in SimplifySetCC()
4447 return DAG.getNode(ISD::TRUNCATE, dl, VT, N0); in SimplifySetCC()
4453 return DAG.getSetCC(dl, VT, N0.getOperand(0), N0.getOperand(1), CC); in SimplifySetCC()
4480 return DAG.getSetCC(dl, VT, Val, N1, in SimplifySetCC()
4501 return DAG.getSetCC(dl, VT, XorLHS, XorRHS, Cond); in SimplifySetCC()
4506 if (Op0.getValueType().bitsGT(VT)) in SimplifySetCC()
4507 Op0 = DAG.getNode(ISD::AND, dl, VT, in SimplifySetCC()
4508 DAG.getNode(ISD::TRUNCATE, dl, VT, Op0.getOperand(0)), in SimplifySetCC()
4509 DAG.getConstant(1, dl, VT)); in SimplifySetCC()
4510 else if (Op0.getValueType().bitsLT(VT)) in SimplifySetCC()
4511 Op0 = DAG.getNode(ISD::AND, dl, VT, in SimplifySetCC()
4512 DAG.getNode(ISD::ANY_EXTEND, dl, VT, Op0.getOperand(0)), in SimplifySetCC()
4513 DAG.getConstant(1, dl, VT)); in SimplifySetCC()
4515 return DAG.getSetCC(dl, VT, Op0, in SimplifySetCC()
4521 return DAG.getSetCC(dl, VT, Op0, in SimplifySetCC()
4536 return DAG.getSetCC(dl, VT, N0.getOperand(0), N1, Cond); in SimplifySetCC()
4545 return DAG.getSetCC(dl, VT, N0.getOperand(0), in SimplifySetCC()
4551 optimizeSetCCOfSignedTruncationCheck(VT, N0, N1, Cond, DCI, dl)) in SimplifySetCC()
4574 return DAG.getBoolConstant(true, dl, VT, OpVT); in SimplifySetCC()
4576 if (!VT.isVector()) { // TODO: Support this for vectors. in SimplifySetCC()
4581 isCondCodeLegal(NewCC, VT.getSimpleVT())) && in SimplifySetCC()
4584 return DAG.getSetCC(dl, VT, N0, in SimplifySetCC()
4594 return DAG.getBoolConstant(true, dl, VT, OpVT); in SimplifySetCC()
4597 if (!VT.isVector()) { // TODO: Support this for vectors. in SimplifySetCC()
4601 isCondCodeLegal(NewCC, VT.getSimpleVT())) && in SimplifySetCC()
4604 return DAG.getSetCC(dl, VT, N0, in SimplifySetCC()
4613 return DAG.getBoolConstant(false, dl, VT, OpVT); // X < MIN --> false in SimplifySetCC()
4616 if (!VT.isVector() || DCI.isBeforeLegalizeOps()) { in SimplifySetCC()
4619 return DAG.getSetCC(dl, VT, N0, N1, ISD::SETNE); in SimplifySetCC()
4623 return DAG.getSetCC(dl, VT, N0, in SimplifySetCC()
4631 return DAG.getBoolConstant(false, dl, VT, OpVT); // X > MAX --> false in SimplifySetCC()
4634 if (!VT.isVector() || DCI.isBeforeLegalizeOps()) { in SimplifySetCC()
4637 return DAG.getSetCC(dl, VT, N0, N1, ISD::SETNE); in SimplifySetCC()
4641 return DAG.getSetCC(dl, VT, N0, in SimplifySetCC()
4651 VT, N0, N1, Cond, DCI, dl)) in SimplifySetCC()
4698 return DAG.getSetCC(dl, VT, NewN0, NewN1, Cond); in SimplifySetCC()
4719 if (!VT.isVector() || DCI.isBeforeLegalizeOps()) { in SimplifySetCC()
4724 return DAG.getSetCC(dl, VT, N0, in SimplifySetCC()
4732 return DAG.getSetCC(dl, VT, N0, in SimplifySetCC()
4749 if ((VT.getSizeInBits() == 1 || in SimplifySetCC()
4752 (VT == ShValTy || (isTypeLegal(VT) && VT.bitsLE(ShValTy))) && in SimplifySetCC()
4762 return DAG.getNode(ISD::TRUNCATE, dl, VT, in SimplifySetCC()
4772 return DAG.getNode(ISD::TRUNCATE, dl, VT, in SimplifySetCC()
4795 return DAG.getSetCC(dl, VT, Shift, CmpRHS, Cond); in SimplifySetCC()
4823 return DAG.getSetCC(dl, VT, Shift, CmpRHS, NewCond); in SimplifySetCC()
4838 return DAG.getSetCC(dl, VT, N0, N0, Cond); in SimplifySetCC()
4846 return DAG.getSetCC(dl, VT, N0.getOperand(0), NegN1, SwapCond); in SimplifySetCC()
4868 return DAG.getSetCC(dl, VT, N0, N1, NewCond); in SimplifySetCC()
4882 return DAG.getBoolConstant(EqTrue, dl, VT, OpVT); in SimplifySetCC()
4884 return DAG.getBoolConstant(EqTrue, dl, VT, OpVT); in SimplifySetCC()
4891 return DAG.getSetCC(dl, VT, N0, N1, NewCond); in SimplifySetCC()
4901 return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(1), Cond); in SimplifySetCC()
4903 return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(0), Cond); in SimplifySetCC()
4907 return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(0), in SimplifySetCC()
4910 return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(1), in SimplifySetCC()
4924 dl, VT, N0.getOperand(0), in SimplifySetCC()
4932 dl, VT, N0.getOperand(0), in SimplifySetCC()
4942 dl, VT, N0.getOperand(1), in SimplifySetCC()
4957 if (SDValue V = foldSetCCWithBinOp(VT, N0, N1, Cond, dl, DCI)) in SimplifySetCC()
4963 if (SDValue V = foldSetCCWithBinOp(VT, N1, N0, Cond, dl, DCI)) in SimplifySetCC()
4966 if (SDValue V = foldSetCCWithAnd(VT, N0, N1, Cond, dl, DCI)) in SimplifySetCC()
4977 if (!isIntDivCheap(VT, Attr) && !Attr.hasFnAttr(Attribute::MinSize)) { in SimplifySetCC()
4979 if (SDValue Folded = buildUREMEqFold(VT, N0, N1, Cond, DCI, dl)) in SimplifySetCC()
4982 if (SDValue Folded = buildSREMEqFold(VT, N0, N1, Cond, DCI, dl)) in SimplifySetCC()
5029 if (VT.getScalarType() != MVT::i1) { in SimplifySetCC()
5034 N0 = DAG.getNode(ExtendCode, dl, VT, N0); in SimplifySetCC()
5227 MVT VT) const { in getRegForInlineAsmConstraint()
5253 if (RI->isTypeLegalForClass(*RC, VT)) in getRegForInlineAsmConstraint()
5378 EVT VT = getAsmOperandValueType(DL, OpTy, true); in ParseConstraints() local
5379 OpInfo.ConstraintVT = VT.isSimple() ? VT.getSimpleVT() : MVT::Other; in ParseConstraints()
5684 EVT VT = N->getValueType(0); in BuildExactSDIV() local
5685 EVT SVT = VT.getScalarType(); in BuildExactSDIV()
5686 EVT ShVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in BuildExactSDIV()
5718 Factor = DAG.getBuildVector(VT, dl, Factors); in BuildExactSDIV()
5724 Factor = DAG.getSplatVector(VT, dl, Factors[0]); in BuildExactSDIV()
5738 Res = DAG.getNode(ISD::SRA, dl, VT, Res, Shift, Flags); in BuildExactSDIV()
5742 return DAG.getNode(ISD::MUL, dl, VT, Res, Factor); in BuildExactSDIV()
5774 EVT VT = N->getValueType(0); in BuildSDIV() local
5775 EVT SVT = VT.getScalarType(); in BuildSDIV()
5776 EVT ShVT = getShiftAmountTy(VT, DAG.getDataLayout()); in BuildSDIV()
5778 unsigned EltBits = VT.getScalarSizeInBits(); in BuildSDIV()
5783 if (!isTypeLegal(VT)) { in BuildSDIV()
5785 if (VT.isVector() || !VT.isSimple()) in BuildSDIV()
5790 if (getTypeAction(VT.getSimpleVT()) != TypePromoteInteger) in BuildSDIV()
5793 MulVT = getTypeToTransformTo(*DAG.getContext(), VT); in BuildSDIV()
5844 MagicFactor = DAG.getBuildVector(VT, dl, MagicFactors); in BuildSDIV()
5845 Factor = DAG.getBuildVector(VT, dl, Factors); in BuildSDIV()
5847 ShiftMask = DAG.getBuildVector(VT, dl, ShiftMasks); in BuildSDIV()
5853 MagicFactor = DAG.getSplatVector(VT, dl, MagicFactors[0]); in BuildSDIV()
5854 Factor = DAG.getSplatVector(VT, dl, Factors[0]); in BuildSDIV()
5856 ShiftMask = DAG.getSplatVector(VT, dl, ShiftMasks[0]); in BuildSDIV()
5870 if (!isTypeLegal(VT)) { in BuildSDIV()
5876 return DAG.getNode(ISD::TRUNCATE, dl, VT, Y); in BuildSDIV()
5879 if (isOperationLegalOrCustom(ISD::MULHS, VT, IsAfterLegalization)) in BuildSDIV()
5880 return DAG.getNode(ISD::MULHS, dl, VT, X, Y); in BuildSDIV()
5881 if (isOperationLegalOrCustom(ISD::SMUL_LOHI, VT, IsAfterLegalization)) { in BuildSDIV()
5883 DAG.getNode(ISD::SMUL_LOHI, dl, DAG.getVTList(VT, VT), X, Y); in BuildSDIV()
5896 Factor = DAG.getNode(ISD::MUL, dl, VT, N0, Factor); in BuildSDIV()
5898 Q = DAG.getNode(ISD::ADD, dl, VT, Q, Factor); in BuildSDIV()
5902 Q = DAG.getNode(ISD::SRA, dl, VT, Q, Shift); in BuildSDIV()
5907 SDValue T = DAG.getNode(ISD::SRL, dl, VT, Q, SignShift); in BuildSDIV()
5909 T = DAG.getNode(ISD::AND, dl, VT, T, ShiftMask); in BuildSDIV()
5911 return DAG.getNode(ISD::ADD, dl, VT, Q, T); in BuildSDIV()
5922 EVT VT = N->getValueType(0); in BuildUDIV() local
5923 EVT SVT = VT.getScalarType(); in BuildUDIV()
5924 EVT ShVT = getShiftAmountTy(VT, DAG.getDataLayout()); in BuildUDIV()
5926 unsigned EltBits = VT.getScalarSizeInBits(); in BuildUDIV()
5931 if (!isTypeLegal(VT)) { in BuildUDIV()
5933 if (VT.isVector() || !VT.isSimple()) in BuildUDIV()
5938 if (getTypeAction(VT.getSimpleVT()) != TypePromoteInteger) in BuildUDIV()
5941 MulVT = getTypeToTransformTo(*DAG.getContext(), VT); in BuildUDIV()
6002 MagicFactor = DAG.getBuildVector(VT, dl, MagicFactors); in BuildUDIV()
6003 NPQFactor = DAG.getBuildVector(VT, dl, NPQFactors); in BuildUDIV()
6010 MagicFactor = DAG.getSplatVector(VT, dl, MagicFactors[0]); in BuildUDIV()
6011 NPQFactor = DAG.getSplatVector(VT, dl, NPQFactors[0]); in BuildUDIV()
6021 Q = DAG.getNode(ISD::SRL, dl, VT, Q, PreShift); in BuildUDIV()
6028 if (!isTypeLegal(VT)) { in BuildUDIV()
6034 return DAG.getNode(ISD::TRUNCATE, dl, VT, Y); in BuildUDIV()
6037 if (isOperationLegalOrCustom(ISD::MULHU, VT, IsAfterLegalization)) in BuildUDIV()
6038 return DAG.getNode(ISD::MULHU, dl, VT, X, Y); in BuildUDIV()
6039 if (isOperationLegalOrCustom(ISD::UMUL_LOHI, VT, IsAfterLegalization)) { in BuildUDIV()
6041 DAG.getNode(ISD::UMUL_LOHI, dl, DAG.getVTList(VT, VT), X, Y); in BuildUDIV()
6055 SDValue NPQ = DAG.getNode(ISD::SUB, dl, VT, N0, Q); in BuildUDIV()
6060 if (VT.isVector()) in BuildUDIV()
6063 NPQ = DAG.getNode(ISD::SRL, dl, VT, NPQ, DAG.getConstant(1, dl, ShVT)); in BuildUDIV()
6067 Q = DAG.getNode(ISD::ADD, dl, VT, NPQ, Q); in BuildUDIV()
6071 Q = DAG.getNode(ISD::SRL, dl, VT, Q, PostShift); in BuildUDIV()
6074 EVT SetCCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in BuildUDIV()
6076 SDValue One = DAG.getConstant(1, dl, VT); in BuildUDIV()
6078 return DAG.getSelect(dl, VT, IsOne, N0, Q); in BuildUDIV()
6145 EVT VT = REMNode.getValueType(); in prepareUREMEqFold() local
6146 EVT SVT = VT.getScalarType(); in prepareUREMEqFold()
6147 EVT ShVT = getShiftAmountTy(VT, DAG.getDataLayout(), !DCI.isBeforeLegalize()); in prepareUREMEqFold()
6151 if (!DCI.isBeforeLegalizeOps() && !isOperationLegalOrCustom(ISD::MUL, VT)) in prepareUREMEqFold()
6271 PVal = DAG.getBuildVector(VT, DL, PAmts); in prepareUREMEqFold()
6273 QVal = DAG.getBuildVector(VT, DL, QAmts); in prepareUREMEqFold()
6278 PVal = DAG.getSplatVector(VT, DL, PAmts[0]); in prepareUREMEqFold()
6280 QVal = DAG.getSplatVector(VT, DL, QAmts[0]); in prepareUREMEqFold()
6288 if (!DCI.isBeforeLegalizeOps() && !isOperationLegalOrCustom(ISD::SUB, VT)) in prepareUREMEqFold()
6292 N = DAG.getNode(ISD::SUB, DL, VT, N, CompTargetNode); in prepareUREMEqFold()
6296 SDValue Op0 = DAG.getNode(ISD::MUL, DL, VT, N, PVal); in prepareUREMEqFold()
6303 if (!DCI.isBeforeLegalizeOps() && !isOperationLegalOrCustom(ISD::ROTR, VT)) in prepareUREMEqFold()
6306 Op0 = DAG.getNode(ISD::ROTR, DL, VT, Op0, KVal); in prepareUREMEqFold()
6320 assert(VT.isVector() && "Can/should only get here for vectors."); in prepareUREMEqFold()
6394 EVT VT = REMNode.getValueType(); in prepareSREMEqFold() local
6395 EVT SVT = VT.getScalarType(); in prepareSREMEqFold()
6396 EVT ShVT = getShiftAmountTy(VT, DAG.getDataLayout(), !DCI.isBeforeLegalize()); in prepareSREMEqFold()
6401 if (!DCI.isBeforeLegalizeOps() && !isOperationLegalOrCustom(ISD::MUL, VT)) in prepareSREMEqFold()
6529 PVal = DAG.getBuildVector(VT, DL, PAmts); in prepareSREMEqFold()
6530 AVal = DAG.getBuildVector(VT, DL, AAmts); in prepareSREMEqFold()
6532 QVal = DAG.getBuildVector(VT, DL, QAmts); in prepareSREMEqFold()
6538 PVal = DAG.getSplatVector(VT, DL, PAmts[0]); in prepareSREMEqFold()
6539 AVal = DAG.getSplatVector(VT, DL, AAmts[0]); in prepareSREMEqFold()
6541 QVal = DAG.getSplatVector(VT, DL, QAmts[0]); in prepareSREMEqFold()
6551 SDValue Op0 = DAG.getNode(ISD::MUL, DL, VT, N, PVal); in prepareSREMEqFold()
6556 if (!DCI.isBeforeLegalizeOps() && !isOperationLegalOrCustom(ISD::ADD, VT)) in prepareSREMEqFold()
6560 Op0 = DAG.getNode(ISD::ADD, DL, VT, Op0, AVal); in prepareSREMEqFold()
6568 if (!DCI.isBeforeLegalizeOps() && !isOperationLegalOrCustom(ISD::ROTR, VT)) in prepareSREMEqFold()
6571 Op0 = DAG.getNode(ISD::ROTR, DL, VT, Op0, KVal); in prepareSREMEqFold()
6587 assert(VT.isVector() && "Can/should only get here for vectors."); in prepareSREMEqFold()
6592 if (!isOperationLegalOrCustom(ISD::SETEQ, VT) || in prepareSREMEqFold()
6593 !isOperationLegalOrCustom(ISD::AND, VT) || in prepareSREMEqFold()
6594 !isOperationLegalOrCustom(Cond, VT) || in prepareSREMEqFold()
6601 APInt::getSignedMinValue(SVT.getScalarSizeInBits()), DL, VT); in prepareSREMEqFold()
6603 APInt::getSignedMaxValue(SVT.getScalarSizeInBits()), DL, VT); in prepareSREMEqFold()
6605 DAG.getConstant(APInt::getZero(SVT.getScalarSizeInBits()), DL, VT); in prepareSREMEqFold()
6612 SDValue Masked = DAG.getNode(ISD::AND, DL, VT, N, IntMax); in prepareSREMEqFold()
6641 EVT VT = Op.getValueType(); in getSqrtInputTest() local
6642 EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in getSqrtInputTest()
6643 SDValue FPZero = DAG.getConstantFP(0.0, DL, VT); in getSqrtInputTest()
6650 const fltSemantics &FltSem = DAG.EVTToAPFloatSemantics(VT); in getSqrtInputTest()
6652 SDValue NormC = DAG.getConstantFP(SmallestNorm, DL, VT); in getSqrtInputTest()
6653 SDValue Fabs = DAG.getNode(ISD::FABS, DL, VT, Op); in getSqrtInputTest()
6678 EVT VT = Op.getValueType(); in getNegatedExpression() local
6684 isFPExtFree(VT, Op.getOperand(0).getValueType()); in getNegatedExpression()
6706 isOperationLegal(ISD::ConstantFP, VT) || in getNegatedExpression()
6707 isFPImmLegal(neg(cast<ConstantFPSDNode>(Op)->getValueAPF()), VT, in getNegatedExpression()
6715 SDValue CFP = DAG.getConstantFP(V, DL, VT); in getNegatedExpression()
6732 (isOperationLegal(ISD::ConstantFP, VT) && in getNegatedExpression()
6733 isOperationLegal(ISD::BUILD_VECTOR, VT)) || in getNegatedExpression()
6736 isFPImmLegal(neg(cast<ConstantFPSDNode>(N)->getValueAPF()), VT, in getNegatedExpression()
6754 return DAG.getBuildVector(VT, DL, Ops); in getNegatedExpression()
6761 if (LegalOps && !isOperationLegalOrCustom(ISD::FSUB, VT)) in getNegatedExpression()
6784 SDValue N = DAG.getNode(ISD::FSUB, DL, VT, NegX, Y, Flags); in getNegatedExpression()
6793 SDValue N = DAG.getNode(ISD::FSUB, DL, VT, NegY, X, Flags); in getNegatedExpression()
6815 return DAG.getNode(ISD::FSUB, DL, VT, Y, X, Flags); in getNegatedExpression()
6840 SDValue N = DAG.getNode(Opcode, DL, VT, NegX, Y, Flags); in getNegatedExpression()
6854 SDValue N = DAG.getNode(Opcode, DL, VT, X, NegY, Flags); in getNegatedExpression()
6896 SDValue N = DAG.getNode(Opcode, DL, VT, NegX, Y, NegZ, Flags); in getNegatedExpression()
6905 SDValue N = DAG.getNode(Opcode, DL, VT, X, NegY, NegZ, Flags); in getNegatedExpression()
6917 return DAG.getNode(Opcode, DL, VT, NegV); in getNegatedExpression()
6922 return DAG.getNode(ISD::FP_ROUND, DL, VT, NegV, Op.getOperand(1)); in getNegatedExpression()
6933 bool TargetLowering::expandMUL_LOHI(unsigned Opcode, EVT VT, const SDLoc &dl, in expandMUL_LOHI() argument
6954 unsigned OuterBitSize = VT.getScalarSizeInBits(); in expandMUL_LOHI()
7004 if (!VT.isVector() && Opcode == ISD::MUL && in expandMUL_LOHI()
7017 EVT ShiftAmountTy = getShiftAmountTy(VT, DAG.getDataLayout()); in expandMUL_LOHI()
7021 isOperationLegalOrCustom(ISD::SRL, VT) && in expandMUL_LOHI()
7023 LH = DAG.getNode(ISD::SRL, dl, VT, LHS, Shift); in expandMUL_LOHI()
7025 RH = DAG.getNode(ISD::SRL, dl, VT, RHS, Shift); in expandMUL_LOHI()
7048 Lo = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Lo); in expandMUL_LOHI()
7049 Hi = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Hi); in expandMUL_LOHI()
7050 Hi = DAG.getNode(ISD::SHL, dl, VT, Hi, Shift); in expandMUL_LOHI()
7051 return DAG.getNode(ISD::OR, dl, VT, Lo, Hi); in expandMUL_LOHI()
7054 SDValue Next = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Hi); in expandMUL_LOHI()
7060 Next = DAG.getNode(ISD::ADD, dl, VT, Next, Merge(Lo, Hi)); in expandMUL_LOHI()
7066 EVT BoolType = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in expandMUL_LOHI()
7068 bool UseGlue = (isOperationLegalOrCustom(ISD::ADDC, VT) && in expandMUL_LOHI()
7069 isOperationLegalOrCustom(ISD::ADDE, VT)); in expandMUL_LOHI()
7071 Next = DAG.getNode(ISD::ADDC, dl, DAG.getVTList(VT, MVT::Glue), Next, in expandMUL_LOHI()
7074 Next = DAG.getNode(ISD::ADDCARRY, dl, DAG.getVTList(VT, BoolType), Next, in expandMUL_LOHI()
7079 Next = DAG.getNode(ISD::SRL, dl, VT, Next, Shift); in expandMUL_LOHI()
7091 Next = DAG.getNode(ISD::ADD, dl, VT, Next, Merge(Lo, Hi)); in expandMUL_LOHI()
7094 SDValue NextSub = DAG.getNode(ISD::SUB, dl, VT, Next, in expandMUL_LOHI()
7095 DAG.getNode(ISD::ZERO_EXTEND, dl, VT, RL)); in expandMUL_LOHI()
7098 NextSub = DAG.getNode(ISD::SUB, dl, VT, Next, in expandMUL_LOHI()
7099 DAG.getNode(ISD::ZERO_EXTEND, dl, VT, LL)); in expandMUL_LOHI()
7104 Next = DAG.getNode(ISD::SRL, dl, VT, Next, Shift); in expandMUL_LOHI()
7135 EVT VT = Node->getValueType(0); in expandFunnelShift() local
7137 if (VT.isVector() && (!isOperationLegalOrCustom(ISD::SHL, VT) || in expandFunnelShift()
7138 !isOperationLegalOrCustom(ISD::SRL, VT) || in expandFunnelShift()
7139 !isOperationLegalOrCustom(ISD::SUB, VT) || in expandFunnelShift()
7140 !isOperationLegalOrCustomOrPromote(ISD::OR, VT))) in expandFunnelShift()
7147 unsigned BW = VT.getScalarSizeInBits(); in expandFunnelShift()
7155 if (!isOperationLegalOrCustom(Node->getOpcode(), VT) && in expandFunnelShift()
7156 isOperationLegalOrCustom(RevOpcode, VT) && isPowerOf2_32(BW)) { in expandFunnelShift()
7161 Z = DAG.getNode(ISD::SUB, DL, VT, Zero, Z); in expandFunnelShift()
7167 Y = DAG.getNode(RevOpcode, DL, VT, X, Y, One); in expandFunnelShift()
7168 X = DAG.getNode(ISD::SRL, DL, VT, X, One); in expandFunnelShift()
7170 X = DAG.getNode(RevOpcode, DL, VT, X, Y, One); in expandFunnelShift()
7171 Y = DAG.getNode(ISD::SHL, DL, VT, Y, One); in expandFunnelShift()
7175 return DAG.getNode(RevOpcode, DL, VT, X, Y, Z); in expandFunnelShift()
7187 ShX = DAG.getNode(ISD::SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt); in expandFunnelShift()
7188 ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt); in expandFunnelShift()
7206 ShX = DAG.getNode(ISD::SHL, DL, VT, X, ShAmt); in expandFunnelShift()
7207 SDValue ShY1 = DAG.getNode(ISD::SRL, DL, VT, Y, One); in expandFunnelShift()
7208 ShY = DAG.getNode(ISD::SRL, DL, VT, ShY1, InvShAmt); in expandFunnelShift()
7210 SDValue ShX1 = DAG.getNode(ISD::SHL, DL, VT, X, One); in expandFunnelShift()
7211 ShX = DAG.getNode(ISD::SHL, DL, VT, ShX1, InvShAmt); in expandFunnelShift()
7212 ShY = DAG.getNode(ISD::SRL, DL, VT, Y, ShAmt); in expandFunnelShift()
7215 return DAG.getNode(ISD::OR, DL, VT, ShX, ShY); in expandFunnelShift()
7221 EVT VT = Node->getValueType(0); in expandROT() local
7222 unsigned EltSizeInBits = VT.getScalarSizeInBits(); in expandROT()
7233 if (!isOperationLegalOrCustom(Node->getOpcode(), VT) && in expandROT()
7234 isOperationLegalOrCustom(RevRot, VT) && isPowerOf2_32(EltSizeInBits)) { in expandROT()
7236 return DAG.getNode(RevRot, DL, VT, Op0, Sub); in expandROT()
7239 if (!AllowVectorOps && VT.isVector() && in expandROT()
7240 (!isOperationLegalOrCustom(ISD::SHL, VT) || in expandROT()
7241 !isOperationLegalOrCustom(ISD::SRL, VT) || in expandROT()
7242 !isOperationLegalOrCustom(ISD::SUB, VT) || in expandROT()
7243 !isOperationLegalOrCustomOrPromote(ISD::OR, VT) || in expandROT()
7244 !isOperationLegalOrCustomOrPromote(ISD::AND, VT))) in expandROT()
7257 ShVal = DAG.getNode(ShOpc, DL, VT, Op0, ShAmt); in expandROT()
7259 HsVal = DAG.getNode(HsOpc, DL, VT, Op0, HsAmt); in expandROT()
7265 ShVal = DAG.getNode(ShOpc, DL, VT, Op0, ShAmt); in expandROT()
7269 DAG.getNode(HsOpc, DL, VT, DAG.getNode(HsOpc, DL, VT, Op0, One), HsAmt); in expandROT()
7271 return DAG.getNode(ISD::OR, DL, VT, ShVal, HsVal); in expandROT()
7277 EVT VT = Node->getValueType(0); in expandShiftParts() local
7278 unsigned VTBits = VT.getScalarSizeInBits(); in expandShiftParts()
7296 SDValue Tmp1 = IsSRA ? DAG.getNode(ISD::SRA, dl, VT, ShOpHi, in expandShiftParts()
7298 : DAG.getConstant(0, dl, VT); in expandShiftParts()
7302 Tmp2 = DAG.getNode(ISD::FSHL, dl, VT, ShOpHi, ShOpLo, ShAmt); in expandShiftParts()
7303 Tmp3 = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, SafeShAmt); in expandShiftParts()
7305 Tmp2 = DAG.getNode(ISD::FSHR, dl, VT, ShOpHi, ShOpLo, ShAmt); in expandShiftParts()
7306 Tmp3 = DAG.getNode(IsSRA ? ISD::SRA : ISD::SRL, dl, VT, ShOpHi, SafeShAmt); in expandShiftParts()
7318 Hi = DAG.getNode(ISD::SELECT, dl, VT, Cond, Tmp3, Tmp2); in expandShiftParts()
7319 Lo = DAG.getNode(ISD::SELECT, dl, VT, Cond, Tmp1, Tmp3); in expandShiftParts()
7321 Lo = DAG.getNode(ISD::SELECT, dl, VT, Cond, Tmp3, Tmp2); in expandShiftParts()
7322 Hi = DAG.getNode(ISD::SELECT, dl, VT, Cond, Tmp1, Tmp3); in expandShiftParts()
7579 EVT VT = Node->getValueType(0); in expandFMINNUM_FMAXNUM() local
7581 if (VT.isScalableVector()) in expandFMINNUM_FMAXNUM()
7585 if (isOperationLegalOrCustom(NewOp, VT)) { in expandFMINNUM_FMAXNUM()
7593 Quiet0 = DAG.getNode(ISD::FCANONICALIZE, dl, VT, Quiet0, in expandFMINNUM_FMAXNUM()
7597 Quiet1 = DAG.getNode(ISD::FCANONICALIZE, dl, VT, Quiet1, in expandFMINNUM_FMAXNUM()
7602 return DAG.getNode(NewOp, dl, VT, Quiet0, Quiet1, Node->getFlags()); in expandFMINNUM_FMAXNUM()
7610 if (isOperationLegalOrCustom(IEEE2018Op, VT)) { in expandFMINNUM_FMAXNUM()
7611 return DAG.getNode(IEEE2018Op, dl, VT, Node->getOperand(0), in expandFMINNUM_FMAXNUM()
7845 static bool canExpandVectorCTPOP(const TargetLowering &TLI, EVT VT) { in canExpandVectorCTPOP() argument
7846 assert(VT.isVector() && "Expected vector type"); in canExpandVectorCTPOP()
7847 unsigned Len = VT.getScalarSizeInBits(); in canExpandVectorCTPOP()
7848 return TLI.isOperationLegalOrCustom(ISD::ADD, VT) && in canExpandVectorCTPOP()
7849 TLI.isOperationLegalOrCustom(ISD::SUB, VT) && in canExpandVectorCTPOP()
7850 TLI.isOperationLegalOrCustom(ISD::SRL, VT) && in canExpandVectorCTPOP()
7851 (Len == 8 || TLI.isOperationLegalOrCustom(ISD::MUL, VT)) && in canExpandVectorCTPOP()
7852 TLI.isOperationLegalOrCustomOrPromote(ISD::AND, VT); in canExpandVectorCTPOP()
7857 EVT VT = Node->getValueType(0); in expandCTPOP() local
7858 EVT ShVT = getShiftAmountTy(VT, DAG.getDataLayout()); in expandCTPOP()
7860 unsigned Len = VT.getScalarSizeInBits(); in expandCTPOP()
7861 assert(VT.isInteger() && "CTPOP not implemented for this type."); in expandCTPOP()
7868 if (VT.isVector() && !canExpandVectorCTPOP(*this, VT)) in expandCTPOP()
7874 DAG.getConstant(APInt::getSplat(Len, APInt(8, 0x55)), dl, VT); in expandCTPOP()
7876 DAG.getConstant(APInt::getSplat(Len, APInt(8, 0x33)), dl, VT); in expandCTPOP()
7878 DAG.getConstant(APInt::getSplat(Len, APInt(8, 0x0F)), dl, VT); in expandCTPOP()
7881 Op = DAG.getNode(ISD::SUB, dl, VT, Op, in expandCTPOP()
7882 DAG.getNode(ISD::AND, dl, VT, in expandCTPOP()
7883 DAG.getNode(ISD::SRL, dl, VT, Op, in expandCTPOP()
7887 Op = DAG.getNode(ISD::ADD, dl, VT, DAG.getNode(ISD::AND, dl, VT, Op, Mask33), in expandCTPOP()
7888 DAG.getNode(ISD::AND, dl, VT, in expandCTPOP()
7889 DAG.getNode(ISD::SRL, dl, VT, Op, in expandCTPOP()
7893 Op = DAG.getNode(ISD::AND, dl, VT, in expandCTPOP()
7894 DAG.getNode(ISD::ADD, dl, VT, Op, in expandCTPOP()
7895 DAG.getNode(ISD::SRL, dl, VT, Op, in expandCTPOP()
7905 if (Len == 16 && !VT.isVector()) { in expandCTPOP()
7907 return DAG.getNode(ISD::AND, dl, VT, in expandCTPOP()
7908 DAG.getNode(ISD::ADD, dl, VT, Op, in expandCTPOP()
7909 DAG.getNode(ISD::SRL, dl, VT, Op, in expandCTPOP()
7911 DAG.getConstant(0xFF, dl, VT)); in expandCTPOP()
7916 DAG.getConstant(APInt::getSplat(Len, APInt(8, 0x01)), dl, VT); in expandCTPOP()
7917 return DAG.getNode(ISD::SRL, dl, VT, in expandCTPOP()
7918 DAG.getNode(ISD::MUL, dl, VT, Op, Mask01), in expandCTPOP()
7924 EVT VT = Node->getValueType(0); in expandCTLZ() local
7925 EVT ShVT = getShiftAmountTy(VT, DAG.getDataLayout()); in expandCTLZ()
7927 unsigned NumBitsPerElt = VT.getScalarSizeInBits(); in expandCTLZ()
7931 isOperationLegalOrCustom(ISD::CTLZ, VT)) in expandCTLZ()
7932 return DAG.getNode(ISD::CTLZ, dl, VT, Op); in expandCTLZ()
7935 if (isOperationLegalOrCustom(ISD::CTLZ_ZERO_UNDEF, VT)) { in expandCTLZ()
7937 getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in expandCTLZ()
7938 SDValue CTLZ = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, dl, VT, Op); in expandCTLZ()
7939 SDValue Zero = DAG.getConstant(0, dl, VT); in expandCTLZ()
7941 return DAG.getSelect(dl, VT, SrcIsZero, in expandCTLZ()
7942 DAG.getConstant(NumBitsPerElt, dl, VT), CTLZ); in expandCTLZ()
7947 if (VT.isVector() && (!isPowerOf2_32(NumBitsPerElt) || in expandCTLZ()
7948 (!isOperationLegalOrCustom(ISD::CTPOP, VT) && in expandCTLZ()
7949 !canExpandVectorCTPOP(*this, VT)) || in expandCTLZ()
7950 !isOperationLegalOrCustom(ISD::SRL, VT) || in expandCTLZ()
7951 !isOperationLegalOrCustomOrPromote(ISD::OR, VT))) in expandCTLZ()
7965 Op = DAG.getNode(ISD::OR, dl, VT, Op, in expandCTLZ()
7966 DAG.getNode(ISD::SRL, dl, VT, Op, Tmp)); in expandCTLZ()
7968 Op = DAG.getNOT(dl, Op, VT); in expandCTLZ()
7969 return DAG.getNode(ISD::CTPOP, dl, VT, Op); in expandCTLZ()
7974 EVT VT = Node->getValueType(0); in expandCTTZ() local
7976 unsigned NumBitsPerElt = VT.getScalarSizeInBits(); in expandCTTZ()
7980 isOperationLegalOrCustom(ISD::CTTZ, VT)) in expandCTTZ()
7981 return DAG.getNode(ISD::CTTZ, dl, VT, Op); in expandCTTZ()
7984 if (isOperationLegalOrCustom(ISD::CTTZ_ZERO_UNDEF, VT)) { in expandCTTZ()
7986 getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in expandCTTZ()
7987 SDValue CTTZ = DAG.getNode(ISD::CTTZ_ZERO_UNDEF, dl, VT, Op); in expandCTTZ()
7988 SDValue Zero = DAG.getConstant(0, dl, VT); in expandCTTZ()
7990 return DAG.getSelect(dl, VT, SrcIsZero, in expandCTTZ()
7991 DAG.getConstant(NumBitsPerElt, dl, VT), CTTZ); in expandCTTZ()
7996 if (VT.isVector() && (!isPowerOf2_32(NumBitsPerElt) || in expandCTTZ()
7997 (!isOperationLegalOrCustom(ISD::CTPOP, VT) && in expandCTTZ()
7998 !isOperationLegalOrCustom(ISD::CTLZ, VT) && in expandCTTZ()
7999 !canExpandVectorCTPOP(*this, VT)) || in expandCTTZ()
8000 !isOperationLegalOrCustom(ISD::SUB, VT) || in expandCTTZ()
8001 !isOperationLegalOrCustomOrPromote(ISD::AND, VT) || in expandCTTZ()
8002 !isOperationLegalOrCustomOrPromote(ISD::XOR, VT))) in expandCTTZ()
8010 ISD::AND, dl, VT, DAG.getNOT(dl, Op, VT), in expandCTTZ()
8011 DAG.getNode(ISD::SUB, dl, VT, Op, DAG.getConstant(1, dl, VT))); in expandCTTZ()
8014 if (isOperationLegal(ISD::CTLZ, VT) && !isOperationLegal(ISD::CTPOP, VT)) { in expandCTTZ()
8015 return DAG.getNode(ISD::SUB, dl, VT, DAG.getConstant(NumBitsPerElt, dl, VT), in expandCTTZ()
8016 DAG.getNode(ISD::CTLZ, dl, VT, Tmp)); in expandCTTZ()
8019 return DAG.getNode(ISD::CTPOP, dl, VT, Tmp); in expandCTTZ()
8025 EVT VT = N->getValueType(0); in expandABS() local
8026 EVT ShVT = getShiftAmountTy(VT, DAG.getDataLayout()); in expandABS()
8030 if (!IsNegative && isOperationLegal(ISD::SUB, VT) && in expandABS()
8031 isOperationLegal(ISD::SMAX, VT)) { in expandABS()
8032 SDValue Zero = DAG.getConstant(0, dl, VT); in expandABS()
8033 return DAG.getNode(ISD::SMAX, dl, VT, Op, in expandABS()
8034 DAG.getNode(ISD::SUB, dl, VT, Zero, Op)); in expandABS()
8038 if (!IsNegative && isOperationLegal(ISD::SUB, VT) && in expandABS()
8039 isOperationLegal(ISD::UMIN, VT)) { in expandABS()
8040 SDValue Zero = DAG.getConstant(0, dl, VT); in expandABS()
8042 return DAG.getNode(ISD::UMIN, dl, VT, Op, in expandABS()
8043 DAG.getNode(ISD::SUB, dl, VT, Zero, Op)); in expandABS()
8047 if (IsNegative && isOperationLegal(ISD::SUB, VT) && in expandABS()
8048 isOperationLegal(ISD::SMIN, VT)) { in expandABS()
8050 SDValue Zero = DAG.getConstant(0, dl, VT); in expandABS()
8051 return DAG.getNode(ISD::SMIN, dl, VT, Op, in expandABS()
8052 DAG.getNode(ISD::SUB, dl, VT, Zero, Op)); in expandABS()
8056 if (VT.isVector() && in expandABS()
8057 (!isOperationLegalOrCustom(ISD::SRA, VT) || in expandABS()
8058 (!IsNegative && !isOperationLegalOrCustom(ISD::ADD, VT)) || in expandABS()
8059 (IsNegative && !isOperationLegalOrCustom(ISD::SUB, VT)) || in expandABS()
8060 !isOperationLegalOrCustomOrPromote(ISD::XOR, VT))) in expandABS()
8065 DAG.getNode(ISD::SRA, dl, VT, Op, in expandABS()
8066 DAG.getConstant(VT.getScalarSizeInBits() - 1, dl, ShVT)); in expandABS()
8067 SDValue Xor = DAG.getNode(ISD::XOR, dl, VT, Op, Shift); in expandABS()
8071 return DAG.getNode(ISD::SUB, dl, VT, Xor, Shift); in expandABS()
8074 return DAG.getNode(ISD::SUB, dl, VT, Shift, Xor); in expandABS()
8079 EVT VT = N->getValueType(0); in expandBSWAP() local
8082 if (!VT.isSimple()) in expandBSWAP()
8085 EVT SHVT = getShiftAmountTy(VT, DAG.getDataLayout()); in expandBSWAP()
8087 switch (VT.getSimpleVT().getScalarType().SimpleTy) { in expandBSWAP()
8092 return DAG.getNode(ISD::ROTL, dl, VT, Op, DAG.getConstant(8, dl, SHVT)); in expandBSWAP()
8094 Tmp4 = DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(24, dl, SHVT)); in expandBSWAP()
8095 Tmp3 = DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(8, dl, SHVT)); in expandBSWAP()
8096 Tmp2 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(8, dl, SHVT)); in expandBSWAP()
8097 Tmp1 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(24, dl, SHVT)); in expandBSWAP()
8098 Tmp3 = DAG.getNode(ISD::AND, dl, VT, Tmp3, in expandBSWAP()
8099 DAG.getConstant(0xFF0000, dl, VT)); in expandBSWAP()
8100 Tmp2 = DAG.getNode(ISD::AND, dl, VT, Tmp2, DAG.getConstant(0xFF00, dl, VT)); in expandBSWAP()
8101 Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp3); in expandBSWAP()
8102 Tmp2 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp1); in expandBSWAP()
8103 return DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp2); in expandBSWAP()
8105 Tmp8 = DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(56, dl, SHVT)); in expandBSWAP()
8106 Tmp7 = DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(40, dl, SHVT)); in expandBSWAP()
8107 Tmp6 = DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(24, dl, SHVT)); in expandBSWAP()
8108 Tmp5 = DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(8, dl, SHVT)); in expandBSWAP()
8109 Tmp4 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(8, dl, SHVT)); in expandBSWAP()
8110 Tmp3 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(24, dl, SHVT)); in expandBSWAP()
8111 Tmp2 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(40, dl, SHVT)); in expandBSWAP()
8112 Tmp1 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(56, dl, SHVT)); in expandBSWAP()
8113 Tmp7 = DAG.getNode(ISD::AND, dl, VT, Tmp7, in expandBSWAP()
8114 DAG.getConstant(255ULL<<48, dl, VT)); in expandBSWAP()
8115 Tmp6 = DAG.getNode(ISD::AND, dl, VT, Tmp6, in expandBSWAP()
8116 DAG.getConstant(255ULL<<40, dl, VT)); in expandBSWAP()
8117 Tmp5 = DAG.getNode(ISD::AND, dl, VT, Tmp5, in expandBSWAP()
8118 DAG.getConstant(255ULL<<32, dl, VT)); in expandBSWAP()
8119 Tmp4 = DAG.getNode(ISD::AND, dl, VT, Tmp4, in expandBSWAP()
8120 DAG.getConstant(255ULL<<24, dl, VT)); in expandBSWAP()
8121 Tmp3 = DAG.getNode(ISD::AND, dl, VT, Tmp3, in expandBSWAP()
8122 DAG.getConstant(255ULL<<16, dl, VT)); in expandBSWAP()
8123 Tmp2 = DAG.getNode(ISD::AND, dl, VT, Tmp2, in expandBSWAP()
8124 DAG.getConstant(255ULL<<8 , dl, VT)); in expandBSWAP()
8125 Tmp8 = DAG.getNode(ISD::OR, dl, VT, Tmp8, Tmp7); in expandBSWAP()
8126 Tmp6 = DAG.getNode(ISD::OR, dl, VT, Tmp6, Tmp5); in expandBSWAP()
8127 Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp3); in expandBSWAP()
8128 Tmp2 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp1); in expandBSWAP()
8129 Tmp8 = DAG.getNode(ISD::OR, dl, VT, Tmp8, Tmp6); in expandBSWAP()
8130 Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp2); in expandBSWAP()
8131 return DAG.getNode(ISD::OR, dl, VT, Tmp8, Tmp4); in expandBSWAP()
8137 EVT VT = N->getValueType(0); in expandBITREVERSE() local
8139 EVT SHVT = getShiftAmountTy(VT, DAG.getDataLayout()); in expandBITREVERSE()
8140 unsigned Sz = VT.getScalarSizeInBits(); in expandBITREVERSE()
8154 Tmp = (Sz > 8 ? DAG.getNode(ISD::BSWAP, dl, VT, Op) : Op); in expandBITREVERSE()
8157 Tmp2 = DAG.getNode(ISD::SRL, dl, VT, Tmp, DAG.getConstant(4, dl, SHVT)); in expandBITREVERSE()
8158 Tmp2 = DAG.getNode(ISD::AND, dl, VT, Tmp2, DAG.getConstant(Mask4, dl, VT)); in expandBITREVERSE()
8159 Tmp3 = DAG.getNode(ISD::AND, dl, VT, Tmp, DAG.getConstant(Mask4, dl, VT)); in expandBITREVERSE()
8160 Tmp3 = DAG.getNode(ISD::SHL, dl, VT, Tmp3, DAG.getConstant(4, dl, SHVT)); in expandBITREVERSE()
8161 Tmp = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); in expandBITREVERSE()
8164 Tmp2 = DAG.getNode(ISD::SRL, dl, VT, Tmp, DAG.getConstant(2, dl, SHVT)); in expandBITREVERSE()
8165 Tmp2 = DAG.getNode(ISD::AND, dl, VT, Tmp2, DAG.getConstant(Mask2, dl, VT)); in expandBITREVERSE()
8166 Tmp3 = DAG.getNode(ISD::AND, dl, VT, Tmp, DAG.getConstant(Mask2, dl, VT)); in expandBITREVERSE()
8167 Tmp3 = DAG.getNode(ISD::SHL, dl, VT, Tmp3, DAG.getConstant(2, dl, SHVT)); in expandBITREVERSE()
8168 Tmp = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); in expandBITREVERSE()
8171 Tmp2 = DAG.getNode(ISD::SRL, dl, VT, Tmp, DAG.getConstant(1, dl, SHVT)); in expandBITREVERSE()
8172 Tmp2 = DAG.getNode(ISD::AND, dl, VT, Tmp2, DAG.getConstant(Mask1, dl, VT)); in expandBITREVERSE()
8173 Tmp3 = DAG.getNode(ISD::AND, dl, VT, Tmp, DAG.getConstant(Mask1, dl, VT)); in expandBITREVERSE()
8174 Tmp3 = DAG.getNode(ISD::SHL, dl, VT, Tmp3, DAG.getConstant(1, dl, SHVT)); in expandBITREVERSE()
8175 Tmp = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); in expandBITREVERSE()
8179 Tmp = DAG.getConstant(0, dl, VT); in expandBITREVERSE()
8183 DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(J - I, dl, SHVT)); in expandBITREVERSE()
8186 DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(I - J, dl, SHVT)); in expandBITREVERSE()
8190 Tmp2 = DAG.getNode(ISD::AND, dl, VT, Tmp2, DAG.getConstant(Shift, dl, VT)); in expandBITREVERSE()
8191 Tmp = DAG.getNode(ISD::OR, dl, VT, Tmp, Tmp2); in expandBITREVERSE()
8371 EVT VT = LD->getValueType(0); in expandUnalignedLoad() local
8376 if (VT.isFloatingPoint() || VT.isVector()) { in expandUnalignedLoad()
8390 if (LoadedVT != VT) in expandUnalignedLoad()
8391 Result = DAG.getNode(VT.isFloatingPoint() ? ISD::FP_EXTEND : in expandUnalignedLoad()
8392 ISD::ANY_EXTEND, dl, VT, Result); in expandUnalignedLoad()
8454 Load = DAG.getExtLoad(LD->getExtensionType(), dl, VT, TF, StackBase, in expandUnalignedLoad()
8483 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, VT, Chain, Ptr, LD->getPointerInfo(), in expandUnalignedLoad()
8488 Hi = DAG.getExtLoad(HiExtType, dl, VT, Chain, Ptr, in expandUnalignedLoad()
8493 Hi = DAG.getExtLoad(HiExtType, dl, VT, Chain, Ptr, LD->getPointerInfo(), in expandUnalignedLoad()
8498 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, VT, Chain, Ptr, in expandUnalignedLoad()
8508 SDValue Result = DAG.getNode(ISD::SHL, dl, VT, Hi, ShiftAmount); in expandUnalignedLoad()
8509 Result = DAG.getNode(ISD::OR, dl, VT, Result, Lo); in expandUnalignedLoad()
8524 EVT VT = Val.getValueType(); in expandUnalignedStore() local
8531 EVT intVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits()); in expandUnalignedStore()
8622 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount); in expandUnalignedStore()
8804 EVT VT = Op.getOperand(0).getValueType(); in lowerCmpEqZeroToCtlzSrl() local
8806 if (VT.bitsLT(MVT::i32)) { in lowerCmpEqZeroToCtlzSrl()
8807 VT = MVT::i32; in lowerCmpEqZeroToCtlzSrl()
8808 Zext = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Op.getOperand(0)); in lowerCmpEqZeroToCtlzSrl()
8810 unsigned Log2b = Log2_32(VT.getSizeInBits()); in lowerCmpEqZeroToCtlzSrl()
8811 SDValue Clz = DAG.getNode(ISD::CTLZ, dl, VT, Zext); in lowerCmpEqZeroToCtlzSrl()
8812 SDValue Scc = DAG.getNode(ISD::SRL, dl, VT, Clz, in lowerCmpEqZeroToCtlzSrl()
8823 EVT VT = Op0.getValueType(); in expandIntMINMAX() local
8828 if (Opcode == ISD::UMIN && isOperationLegal(ISD::SUB, VT) && in expandIntMINMAX()
8829 isOperationLegal(ISD::USUBSAT, VT)) { in expandIntMINMAX()
8830 return DAG.getNode(ISD::SUB, DL, VT, Op0, in expandIntMINMAX()
8831 DAG.getNode(ISD::USUBSAT, DL, VT, Op0, Op1)); in expandIntMINMAX()
8835 if (Opcode == ISD::UMAX && isOperationLegal(ISD::ADD, VT) && in expandIntMINMAX()
8836 isOperationLegal(ISD::USUBSAT, VT)) { in expandIntMINMAX()
8837 return DAG.getNode(ISD::ADD, DL, VT, Op0, in expandIntMINMAX()
8838 DAG.getNode(ISD::USUBSAT, DL, VT, Op1, Op0)); in expandIntMINMAX()
8853 if (VT.isVector() && !isOperationLegalOrCustom(ISD::VSELECT, VT)) in expandIntMINMAX()
8856 EVT BoolVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in expandIntMINMAX()
8858 return DAG.getSelect(DL, VT, Cond, Op0, Op1); in expandIntMINMAX()
8865 EVT VT = LHS.getValueType(); in expandAddSubSat() local
8868 assert(VT == RHS.getValueType() && "Expected operands to be the same type"); in expandAddSubSat()
8869 assert(VT.isInteger() && "Expected operands to be integers"); in expandAddSubSat()
8872 if (Opcode == ISD::USUBSAT && isOperationLegal(ISD::UMAX, VT)) { in expandAddSubSat()
8873 SDValue Max = DAG.getNode(ISD::UMAX, dl, VT, LHS, RHS); in expandAddSubSat()
8874 return DAG.getNode(ISD::SUB, dl, VT, Max, RHS); in expandAddSubSat()
8878 if (Opcode == ISD::UADDSAT && isOperationLegal(ISD::UMIN, VT)) { in expandAddSubSat()
8879 SDValue InvRHS = DAG.getNOT(dl, RHS, VT); in expandAddSubSat()
8880 SDValue Min = DAG.getNode(ISD::UMIN, dl, VT, LHS, InvRHS); in expandAddSubSat()
8881 return DAG.getNode(ISD::ADD, dl, VT, Min, RHS); in expandAddSubSat()
8905 if (VT.isVector() && !isOperationLegalOrCustom(ISD::VSELECT, VT)) in expandAddSubSat()
8909 EVT BoolVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in expandAddSubSat()
8910 SDValue Result = DAG.getNode(OverflowOp, dl, DAG.getVTList(VT, BoolVT), LHS, RHS); in expandAddSubSat()
8913 SDValue Zero = DAG.getConstant(0, dl, VT); in expandAddSubSat()
8914 SDValue AllOnes = DAG.getAllOnesConstant(dl, VT); in expandAddSubSat()
8917 if (getBooleanContents(VT) == ZeroOrNegativeOneBooleanContent) { in expandAddSubSat()
8919 SDValue OverflowMask = DAG.getSExtOrTrunc(Overflow, dl, VT); in expandAddSubSat()
8920 return DAG.getNode(ISD::OR, dl, VT, SumDiff, OverflowMask); in expandAddSubSat()
8923 return DAG.getSelect(dl, VT, Overflow, AllOnes, SumDiff); in expandAddSubSat()
8927 if (getBooleanContents(VT) == ZeroOrNegativeOneBooleanContent) { in expandAddSubSat()
8929 SDValue OverflowMask = DAG.getSExtOrTrunc(Overflow, dl, VT); in expandAddSubSat()
8930 SDValue Not = DAG.getNOT(dl, OverflowMask, VT); in expandAddSubSat()
8931 return DAG.getNode(ISD::AND, dl, VT, SumDiff, Not); in expandAddSubSat()
8934 return DAG.getSelect(dl, VT, Overflow, Zero, SumDiff); in expandAddSubSat()
8939 SDValue SatMin = DAG.getConstant(MinVal, dl, VT); in expandAddSubSat()
8940 SDValue Shift = DAG.getNode(ISD::SRA, dl, VT, SumDiff, in expandAddSubSat()
8941 DAG.getConstant(BitWidth - 1, dl, VT)); in expandAddSubSat()
8942 Result = DAG.getNode(ISD::XOR, dl, VT, Shift, SatMin); in expandAddSubSat()
8943 return DAG.getSelect(dl, VT, Overflow, Result, SumDiff); in expandAddSubSat()
8951 EVT VT = LHS.getValueType(); in expandShlSat() local
8957 assert(VT == RHS.getValueType() && "Expected operands to be the same type"); in expandShlSat()
8958 assert(VT.isInteger() && "Expected operands to be integers"); in expandShlSat()
8962 unsigned BW = VT.getScalarSizeInBits(); in expandShlSat()
8963 SDValue Result = DAG.getNode(ISD::SHL, dl, VT, LHS, RHS); in expandShlSat()
8965 DAG.getNode(IsSigned ? ISD::SRA : ISD::SRL, dl, VT, Result, RHS); in expandShlSat()
8969 SDValue SatMin = DAG.getConstant(APInt::getSignedMinValue(BW), dl, VT); in expandShlSat()
8970 SDValue SatMax = DAG.getConstant(APInt::getSignedMaxValue(BW), dl, VT); in expandShlSat()
8971 SatVal = DAG.getSelectCC(dl, LHS, DAG.getConstant(0, dl, VT), in expandShlSat()
8974 SatVal = DAG.getConstant(APInt::getMaxValue(BW), dl, VT); in expandShlSat()
8992 EVT VT = LHS.getValueType(); in expandFixedPointMul() local
8998 EVT BoolVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in expandFixedPointMul()
8999 unsigned VTSize = VT.getScalarSizeInBits(); in expandFixedPointMul()
9004 if (isOperationLegalOrCustom(ISD::MUL, VT)) in expandFixedPointMul()
9005 return DAG.getNode(ISD::MUL, dl, VT, LHS, RHS); in expandFixedPointMul()
9006 } else if (Signed && isOperationLegalOrCustom(ISD::SMULO, VT)) { in expandFixedPointMul()
9008 DAG.getNode(ISD::SMULO, dl, DAG.getVTList(VT, BoolVT), LHS, RHS); in expandFixedPointMul()
9011 SDValue Zero = DAG.getConstant(0, dl, VT); in expandFixedPointMul()
9015 SDValue SatMin = DAG.getConstant(MinVal, dl, VT); in expandFixedPointMul()
9016 SDValue SatMax = DAG.getConstant(MaxVal, dl, VT); in expandFixedPointMul()
9019 SDValue Xor = DAG.getNode(ISD::XOR, dl, VT, LHS, RHS); in expandFixedPointMul()
9021 Result = DAG.getSelect(dl, VT, ProdNeg, SatMin, SatMax); in expandFixedPointMul()
9022 return DAG.getSelect(dl, VT, Overflow, Result, Product); in expandFixedPointMul()
9023 } else if (!Signed && isOperationLegalOrCustom(ISD::UMULO, VT)) { in expandFixedPointMul()
9025 DAG.getNode(ISD::UMULO, dl, DAG.getVTList(VT, BoolVT), LHS, RHS); in expandFixedPointMul()
9030 SDValue SatMax = DAG.getConstant(MaxVal, dl, VT); in expandFixedPointMul()
9031 return DAG.getSelect(dl, VT, Overflow, SatMax, Product); in expandFixedPointMul()
9045 if (isOperationLegalOrCustom(LoHiOp, VT)) { in expandFixedPointMul()
9046 SDValue Result = DAG.getNode(LoHiOp, dl, DAG.getVTList(VT, VT), LHS, RHS); in expandFixedPointMul()
9049 } else if (isOperationLegalOrCustom(HiOp, VT)) { in expandFixedPointMul()
9050 Lo = DAG.getNode(ISD::MUL, dl, VT, LHS, RHS); in expandFixedPointMul()
9051 Hi = DAG.getNode(HiOp, dl, VT, LHS, RHS); in expandFixedPointMul()
9052 } else if (VT.isVector()) { in expandFixedPointMul()
9067 EVT ShiftTy = getShiftAmountTy(VT, DAG.getDataLayout()); in expandFixedPointMul()
9068 SDValue Result = DAG.getNode(ISD::FSHR, dl, VT, Hi, Lo, in expandFixedPointMul()
9081 dl, VT); in expandFixedPointMul()
9083 DAG.getConstant(MaxVal, dl, VT), Result, in expandFixedPointMul()
9092 SDValue SatMin = DAG.getConstant(APInt::getSignedMinValue(VTSize), dl, VT); in expandFixedPointMul()
9093 SDValue SatMax = DAG.getConstant(APInt::getSignedMaxValue(VTSize), dl, VT); in expandFixedPointMul()
9096 SDValue Sign = DAG.getNode(ISD::SRA, dl, VT, Lo, in expandFixedPointMul()
9101 SDValue Zero = DAG.getConstant(0, dl, VT); in expandFixedPointMul()
9105 return DAG.getSelect(dl, VT, Overflow, ResultIfOverflow, Result); in expandFixedPointMul()
9113 dl, VT); in expandFixedPointMul()
9119 dl, VT); in expandFixedPointMul()
9132 EVT VT = LHS.getValueType(); in expandFixedPointDiv() local
9135 EVT BoolVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in expandFixedPointDiv()
9164 EVT ShiftTy = getShiftAmountTy(VT, DAG.getDataLayout()); in expandFixedPointDiv()
9166 LHS = DAG.getNode(ISD::SHL, dl, VT, LHS, in expandFixedPointDiv()
9169 RHS = DAG.getNode(Signed ? ISD::SRA : ISD::SRL, dl, VT, RHS, in expandFixedPointDiv()
9181 if (isTypeLegal(VT) && in expandFixedPointDiv()
9182 isOperationLegalOrCustom(ISD::SDIVREM, VT)) { in expandFixedPointDiv()
9184 DAG.getVTList(VT, VT), in expandFixedPointDiv()
9189 Quot = DAG.getNode(ISD::SDIV, dl, VT, in expandFixedPointDiv()
9191 Rem = DAG.getNode(ISD::SREM, dl, VT, in expandFixedPointDiv()
9194 SDValue Zero = DAG.getConstant(0, dl, VT); in expandFixedPointDiv()
9199 SDValue Sub1 = DAG.getNode(ISD::SUB, dl, VT, Quot, in expandFixedPointDiv()
9200 DAG.getConstant(1, dl, VT)); in expandFixedPointDiv()
9201 Quot = DAG.getSelect(dl, VT, in expandFixedPointDiv()
9205 Quot = DAG.getNode(ISD::UDIV, dl, VT, in expandFixedPointDiv()
9295 EVT VT = Node->getValueType(0); in expandMULO() local
9296 EVT SetCCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in expandMULO()
9308 EVT ShiftAmtTy = getShiftAmountTy(VT, DAG.getDataLayout()); in expandMULO()
9310 Result = DAG.getNode(ISD::SHL, dl, VT, LHS, ShiftAmt); in expandMULO()
9313 dl, VT, Result, ShiftAmt), in expandMULO()
9319 EVT WideVT = EVT::getIntegerVT(*DAG.getContext(), VT.getScalarSizeInBits() * 2); in expandMULO()
9320 if (VT.isVector()) in expandMULO()
9322 EVT::getVectorVT(*DAG.getContext(), WideVT, VT.getVectorElementCount()); in expandMULO()
9329 if (isOperationLegalOrCustom(Ops[isSigned][0], VT)) { in expandMULO()
9330 BottomHalf = DAG.getNode(ISD::MUL, dl, VT, LHS, RHS); in expandMULO()
9331 TopHalf = DAG.getNode(Ops[isSigned][0], dl, VT, LHS, RHS); in expandMULO()
9332 } else if (isOperationLegalOrCustom(Ops[isSigned][1], VT)) { in expandMULO()
9333 BottomHalf = DAG.getNode(Ops[isSigned][1], dl, DAG.getVTList(VT, VT), LHS, in expandMULO()
9340 BottomHalf = DAG.getNode(ISD::TRUNCATE, dl, VT, Mul); in expandMULO()
9341 SDValue ShiftAmt = DAG.getConstant(VT.getScalarSizeInBits(), dl, in expandMULO()
9343 TopHalf = DAG.getNode(ISD::TRUNCATE, dl, VT, in expandMULO()
9346 if (VT.isVector()) in expandMULO()
9369 unsigned LoSize = VT.getFixedSizeInBits(); in expandMULO()
9371 DAG.getNode(ISD::SRA, dl, VT, LHS, in expandMULO()
9375 DAG.getNode(ISD::SRA, dl, VT, RHS, in expandMULO()
9379 HiLHS = DAG.getConstant(0, dl, VT); in expandMULO()
9380 HiRHS = DAG.getConstant(0, dl, VT); in expandMULO()
9417 VT.getScalarSizeInBits() - 1, dl, in expandMULO()
9419 SDValue Sign = DAG.getNode(ISD::SRA, dl, VT, BottomHalf, ShiftAmt); in expandMULO()
9423 DAG.getConstant(0, dl, VT), ISD::SETNE); in expandMULO()
9440 EVT VT = Op.getValueType(); in expandVecReduce() local
9442 if (VT.isScalableVector()) in expandVecReduce()
9447 if (VT.isPow2VectorType()) { in expandVecReduce()
9448 while (VT.getVectorNumElements() > 1) { in expandVecReduce()
9449 EVT HalfVT = VT.getHalfNumVectorElementsVT(*DAG.getContext()); in expandVecReduce()
9456 VT = HalfVT; in expandVecReduce()
9460 EVT EltVT = VT.getVectorElementType(); in expandVecReduce()
9461 unsigned NumElts = VT.getVectorNumElements(); in expandVecReduce()
9482 EVT VT = VecOp.getValueType(); in expandVecReduceSeq() local
9483 EVT EltVT = VT.getVectorElementType(); in expandVecReduceSeq()
9485 if (VT.isScalableVector()) in expandVecReduceSeq()
9489 unsigned NumElts = VT.getVectorNumElements(); in expandVecReduceSeq()
9505 EVT VT = Node->getValueType(0); in expandREM() local
9512 if (isOperationLegalOrCustom(DivRemOpc, VT)) { in expandREM()
9513 SDVTList VTs = DAG.getVTList(VT, VT); in expandREM()
9517 if (isOperationLegalOrCustom(DivOpc, VT)) { in expandREM()
9519 SDValue Divide = DAG.getNode(DivOpc, dl, VT, Dividend, Divisor); in expandREM()
9520 SDValue Mul = DAG.getNode(ISD::MUL, dl, VT, Divide, Divisor); in expandREM()
9521 Result = DAG.getNode(ISD::SUB, dl, VT, Dividend, Mul); in expandREM()
9636 EVT VT = Node->getValueType(0); in expandVectorSplice() local
9653 Align Alignment = DAG.getReducedAlign(VT, /*UseABI=*/false); in expandVectorSplice()
9655 EVT MemVT = EVT::getVectorVT(*DAG.getContext(), VT.getVectorElementType(), in expandVectorSplice()
9656 VT.getVectorElementCount() * 2); in expandVectorSplice()
9668 APInt(PtrVT.getFixedSizeInBits(), VT.getStoreSize().getKnownMinSize())); in expandVectorSplice()
9675 StackPtr = getVectorElementPointer(DAG, StackPtr, VT, Node->getOperand(2)); in expandVectorSplice()
9677 return DAG.getLoad(VT, DL, StoreV2, StackPtr, in expandVectorSplice()
9684 TypeSize EltByteSize = VT.getVectorElementType().getStoreSize(); in expandVectorSplice()
9688 if (TrailingElts > VT.getVectorMinNumElements()) { in expandVectorSplice()
9691 APInt(PtrVT.getFixedSizeInBits(), VT.getStoreSize().getKnownMinSize())); in expandVectorSplice()
9699 return DAG.getLoad(VT, DL, StoreV2, StackPtr2, in expandVectorSplice()
9703 bool TargetLowering::LegalizeSetCCCondCode(SelectionDAG &DAG, EVT VT, in LegalizeSetCCCondCode() argument
9822 SetCC1 = DAG.getSetCC(dl, VT, LHS, RHS, CC1, Chain, IsSignaling); in LegalizeSetCCCondCode()
9823 SetCC2 = DAG.getSetCC(dl, VT, LHS, RHS, CC2, Chain, IsSignaling); in LegalizeSetCCCondCode()
9825 SetCC1 = DAG.getSetCCVP(dl, VT, LHS, RHS, CC1, Mask, EVL); in LegalizeSetCCCondCode()
9826 SetCC2 = DAG.getSetCCVP(dl, VT, LHS, RHS, CC2, Mask, EVL); in LegalizeSetCCCondCode()
9831 SetCC1 = DAG.getSetCC(dl, VT, LHS, LHS, CC1, Chain, IsSignaling); in LegalizeSetCCCondCode()
9832 SetCC2 = DAG.getSetCC(dl, VT, RHS, RHS, CC2, Chain, IsSignaling); in LegalizeSetCCCondCode()
9834 SetCC1 = DAG.getSetCCVP(dl, VT, LHS, LHS, CC1, Mask, EVL); in LegalizeSetCCCondCode()
9835 SetCC2 = DAG.getSetCCVP(dl, VT, RHS, RHS, CC2, Mask, EVL); in LegalizeSetCCCondCode()
9842 LHS = DAG.getNode(Opc, dl, VT, SetCC1, SetCC2); in LegalizeSetCCCondCode()
9847 LHS = DAG.getNode(Opc, dl, VT, SetCC1, SetCC2, Mask, EVL); in LegalizeSetCCCondCode()