Lines Matching refs:ShiftAmount
2133 unsigned ShiftAmount = NLZ > NTZ ? NLZ - NTZ : NTZ - NLZ; in SimplifyDemandedBits() local
2134 SDValue ShAmt = TLO.DAG.getConstant(ShiftAmount, dl, ShiftAmtTy); in SimplifyDemandedBits()
5818 magics.ShiftAmount = 0; in BuildSDIV()
5830 Shifts.push_back(DAG.getConstant(magics.ShiftAmount, dl, ShSVT)); in BuildSDIV()
5972 assert(magics.ShiftAmount < Divisor.getBitWidth() && in BuildUDIV()
5974 PostShift = magics.ShiftAmount; in BuildUDIV()
5977 PostShift = magics.ShiftAmount - 1; in BuildUDIV()
7016 unsigned ShiftAmount = OuterBitSize - InnerBitSize; in expandMUL_LOHI() local
7018 SDValue Shift = DAG.getConstant(ShiftAmount, dl, ShiftAmountTy); in expandMUL_LOHI()
8243 SDValue ShiftAmount = in scalarizeVectorLoad() local
8246 SDValue ShiftedElt = DAG.getNode(ISD::SRL, SL, LoadVT, Load, ShiftAmount); in scalarizeVectorLoad()
8328 SDValue ShiftAmount = in scalarizeVectorStore() local
8331 DAG.getNode(ISD::SHL, SL, IntVT, ExtElt, ShiftAmount); in scalarizeVectorStore()
8505 SDValue ShiftAmount = in expandUnalignedLoad() local
8508 SDValue Result = DAG.getNode(ISD::SHL, dl, VT, Hi, ShiftAmount); in expandUnalignedLoad()
8619 SDValue ShiftAmount = DAG.getConstant( in expandUnalignedStore() local
8622 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount); in expandUnalignedStore()