Lines Matching refs:SRL
934 assert((Op.getOpcode() == ISD::SRL || Op.getOpcode() == ISD::SRA) && in combineShiftToAVG()
1015 case ISD::SRL: { in combineShiftToAVG()
1567 if ((Op0Opcode == ISD::SRL || Op0Opcode == ISD::SHL) && Op0.hasOneUse()) { in SimplifyDemandedBits()
1705 if (Op0.getOpcode() == ISD::SRL) { in SimplifyDemandedBits()
1714 Opc = ISD::SRL; in SimplifyDemandedBits()
1748 if (Op0.hasOneUse() && InnerOp.getOpcode() == ISD::SRL && in SimplifyDemandedBits()
1828 case ISD::SRL: { in SimplifyDemandedBits()
1853 unsigned Opc = ISD::SRL; in SimplifyDemandedBits()
1902 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl, VT, Op0, Op1)); in SimplifyDemandedBits()
1941 Op, TLO.DAG.getNode(ISD::SRL, dl, VT, Op0, Op1, Flags)); in SimplifyDemandedBits()
1948 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl, VT, Op0, NewSA)); in SimplifyDemandedBits()
2061 if ((!TLO.LegalOperations() || isOperationLegal(ISD::SRL, VT)) && in SimplifyDemandedBits()
2064 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl, VT, Op0, Op1)); in SimplifyDemandedBits()
2130 unsigned ShiftOpcode = NLZ > NTZ ? ISD::SRL : ISD::SHL; in SimplifyDemandedBits()
2376 case ISD::SRL: in SimplifyDemandedBits()
2379 if (TLO.LegalTypes() && !isTypeDesirableForOp(ISD::SRL, VT)) in SimplifyDemandedBits()
2403 Op, TLO.DAG.getNode(ISD::SRL, dl, VT, NewTrunc, NewShAmt)); in SimplifyDemandedBits()
3343 case ISD::SRL: in SimplifyDemandedVectorElts()
3864 NewShiftOpcode = ISD::SRL; in optimizeSetCCByHoistingAndByConstFromLogicalShift()
3866 case ISD::SRL: in optimizeSetCCByHoistingAndByConstFromLogicalShift()
4123 SDValue Shift = DAG.getNode(ISD::SRL, dl, OpVT, Y, NewShAmt); in foldSetCCWithFunnelShift()
4187 if (N0.getOpcode() == ISD::SRL && (C1.isZero() || C1.isOne()) && in SimplifySetCC()
4763 DAG.getNode(ISD::SRL, dl, ShValTy, N0, in SimplifySetCC()
4773 DAG.getNode(ISD::SRL, dl, ShValTy, N0, in SimplifySetCC()
4792 DAG.getNode(ISD::SRL, dl, ShValTy, N0.getOperand(0), in SimplifySetCC()
4820 SDValue Shift = DAG.getNode(ISD::SRL, dl, ShValTy, N0, in SimplifySetCC()
5874 Y = DAG.getNode(ISD::SRL, dl, MulVT, Y, in BuildSDIV()
5907 SDValue T = DAG.getNode(ISD::SRL, dl, VT, Q, SignShift); in BuildSDIV()
6021 Q = DAG.getNode(ISD::SRL, dl, VT, Q, PreShift); in BuildUDIV()
6032 Y = DAG.getNode(ISD::SRL, dl, MulVT, Y, in BuildUDIV()
6063 NPQ = DAG.getNode(ISD::SRL, dl, VT, NPQ, DAG.getConstant(1, dl, ShVT)); in BuildUDIV()
6071 Q = DAG.getNode(ISD::SRL, dl, VT, Q, PostShift); in BuildUDIV()
7021 isOperationLegalOrCustom(ISD::SRL, VT) && in expandMUL_LOHI()
7023 LH = DAG.getNode(ISD::SRL, dl, VT, LHS, Shift); in expandMUL_LOHI()
7025 RH = DAG.getNode(ISD::SRL, dl, VT, RHS, Shift); in expandMUL_LOHI()
7079 Next = DAG.getNode(ISD::SRL, dl, VT, Next, Shift); in expandMUL_LOHI()
7104 Next = DAG.getNode(ISD::SRL, dl, VT, Next, Shift); in expandMUL_LOHI()
7138 !isOperationLegalOrCustom(ISD::SRL, VT) || in expandFunnelShift()
7168 X = DAG.getNode(ISD::SRL, DL, VT, X, One); in expandFunnelShift()
7188 ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt); in expandFunnelShift()
7207 SDValue ShY1 = DAG.getNode(ISD::SRL, DL, VT, Y, One); in expandFunnelShift()
7208 ShY = DAG.getNode(ISD::SRL, DL, VT, ShY1, InvShAmt); in expandFunnelShift()
7212 ShY = DAG.getNode(ISD::SRL, DL, VT, Y, ShAmt); in expandFunnelShift()
7241 !isOperationLegalOrCustom(ISD::SRL, VT) || in expandROT()
7247 unsigned ShOpc = IsLeft ? ISD::SHL : ISD::SRL; in expandROT()
7248 unsigned HsOpc = IsLeft ? ISD::SRL : ISD::SHL; in expandROT()
7306 Tmp3 = DAG.getNode(IsSRA ? ISD::SRA : ISD::SRL, dl, VT, ShOpHi, SafeShAmt); in expandShiftParts()
7362 ISD::SRL, dl, IntVT, DAG.getNode(ISD::AND, dl, IntVT, Bits, ExponentMask), in expandFP_TO_SINT()
7383 DAG.getNode(ISD::SRL, dl, DstVT, R, in expandFP_TO_SINT()
7516 if (SrcVT.isVector() && (!isOperationLegalOrCustom(ISD::SRL, SrcVT) || in expandUINT_TO_FP()
7539 SDValue Hi = DAG.getNode(ISD::SRL, dl, SrcVT, Src, HiShift); in expandUINT_TO_FP()
7850 TLI.isOperationLegalOrCustom(ISD::SRL, VT) && in canExpandVectorCTPOP()
7883 DAG.getNode(ISD::SRL, dl, VT, Op, in expandCTPOP()
7889 DAG.getNode(ISD::SRL, dl, VT, Op, in expandCTPOP()
7895 DAG.getNode(ISD::SRL, dl, VT, Op, in expandCTPOP()
7909 DAG.getNode(ISD::SRL, dl, VT, Op, in expandCTPOP()
7917 return DAG.getNode(ISD::SRL, dl, VT, in expandCTPOP()
7950 !isOperationLegalOrCustom(ISD::SRL, VT) || in expandCTLZ()
7966 DAG.getNode(ISD::SRL, dl, VT, Op, Tmp)); in expandCTLZ()
8096 Tmp2 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(8, dl, SHVT)); in expandBSWAP()
8097 Tmp1 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(24, dl, SHVT)); in expandBSWAP()
8109 Tmp4 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(8, dl, SHVT)); in expandBSWAP()
8110 Tmp3 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(24, dl, SHVT)); in expandBSWAP()
8111 Tmp2 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(40, dl, SHVT)); in expandBSWAP()
8112 Tmp1 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(56, dl, SHVT)); in expandBSWAP()
8157 Tmp2 = DAG.getNode(ISD::SRL, dl, VT, Tmp, DAG.getConstant(4, dl, SHVT)); in expandBITREVERSE()
8164 Tmp2 = DAG.getNode(ISD::SRL, dl, VT, Tmp, DAG.getConstant(2, dl, SHVT)); in expandBITREVERSE()
8171 Tmp2 = DAG.getNode(ISD::SRL, dl, VT, Tmp, DAG.getConstant(1, dl, SHVT)); in expandBITREVERSE()
8186 DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(I - J, dl, SHVT)); in expandBITREVERSE()
8246 SDValue ShiftedElt = DAG.getNode(ISD::SRL, SL, LoadVT, Load, ShiftAmount); in scalarizeVectorLoad()
8622 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount); in expandUnalignedStore()
8812 SDValue Scc = DAG.getNode(ISD::SRL, dl, VT, Clz, in lowerCmpEqZeroToCtlzSrl()
8965 DAG.getNode(IsSigned ? ISD::SRA : ISD::SRL, dl, VT, Result, RHS); in expandShlSat()
9169 RHS = DAG.getNode(Signed ? ISD::SRA : ISD::SRL, dl, VT, RHS, in expandFixedPointDiv()
9312 DAG.getNode(UseArithShift ? ISD::SRA : ISD::SRL, in expandMULO()
9344 DAG.getNode(ISD::SRL, dl, WideVT, Mul, ShiftAmt)); in expandMULO()