Lines Matching refs:IsFSHL
1972 bool IsFSHL = (Op.getOpcode() == ISD::FSHL); in SimplifyDemandedBits() local
1980 if (SimplifyDemandedBits(IsFSHL ? Op0 : Op1, DemandedBits, DemandedElts, in SimplifyDemandedBits()
1988 APInt Demanded0 = DemandedBits.lshr(IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits()
1989 APInt Demanded1 = DemandedBits << (IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits()
1997 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits()
1998 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits()
1999 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits()
2000 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits()
7148 bool IsFSHL = Node->getOpcode() == ISD::FSHL; in expandFunnelShift() local
7154 unsigned RevOpcode = IsFSHL ? ISD::FSHR : ISD::FSHL; in expandFunnelShift()
7166 if (IsFSHL) { in expandFunnelShift()
7187 ShX = DAG.getNode(ISD::SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt); in expandFunnelShift()
7188 ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt); in expandFunnelShift()
7205 if (IsFSHL) { in expandFunnelShift()