Lines Matching refs:DemandedRHS
1293 APInt DemandedRHS(NumElts, 0); in SimplifyDemandedBits() local
1302 DemandedRHS.clearAllBits(); in SimplifyDemandedBits()
1309 DemandedRHS.setBit(M - NumElts); in SimplifyDemandedBits()
1312 if (!!DemandedLHS || !!DemandedRHS) { in SimplifyDemandedBits()
1324 if (!!DemandedRHS) { in SimplifyDemandedBits()
1325 if (SimplifyDemandedBits(Op1, DemandedBits, DemandedRHS, Known2, TLO, in SimplifyDemandedBits()
1335 Op1, DemandedBits, DemandedRHS, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
3155 APInt DemandedRHS(DemandedElts); in SimplifyDemandedVectorElts() local
3161 if (SimplifyDemandedVectorElts(RHS, DemandedRHS, UndefRHS, ZeroRHS, TLO, in SimplifyDemandedVectorElts()
3183 APInt DemandedRHS(NumElts, 0); in SimplifyDemandedVectorElts() local
3192 DemandedRHS.setBit(M - NumElts); in SimplifyDemandedVectorElts()
3201 if (SimplifyDemandedVectorElts(Op.getOperand(1), DemandedRHS, UndefRHS, in SimplifyDemandedVectorElts()