83   TLI = MF->getSubtarget().getTargetLowering();  in set()
92   GetReturnInfo(CC, Fn->getReturnType(), Fn->getAttributes(), Outs, *TLI,  in set()
95       TLI->CanLowerReturn(CC, *MF, Fn->isVarArg(), Outs, Fn->getContext());  in set()
163           if (Iter != CatchObjects.end() && TLI->needsFixedCatchObjects()) {  in set()
195           Register SP = TLI->getStackPointerRegisterToSaveRestore();  in set()
198               TLI->ParseConstraints(Fn->getParent()->getDataLayout(), TRI,  in set()
203               TLI->ComputeConstraintToUse(Op, SDValue(), DAG);  in set()
205                   TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode,  in set()
294       ComputeValueVTs(*TLI, MF->getDataLayout(), PN.getType(), ValueVTs);  in set()
296         unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);  in set()
384   const TargetLowering *TLI = MF->getSubtarget().getTargetLowering();  in CreateRegs()  local
387   ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);  in CreateRegs()
392     MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT);  in CreateRegs()
394     unsigned NumRegs = TLI->getNumRegisters(Ty->getContext(), ValueVT);  in CreateRegs()
405                     !TLI->requiresUniformRegister(*MF, V));  in CreateRegs()
438   ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);  in ComputePHILiveOutRegInfo()
443   if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1)  in ComputePHILiveOutRegInfo()
445   IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT);  in ComputePHILiveOutRegInfo()
468     if (TLI->signExtendConstant(CI))  in ComputePHILiveOutRegInfo()
504       if (TLI->signExtendConstant(CI))  in ComputePHILiveOutRegInfo()
567       ComputeValueVTs(*TLI, Fn->getParent()->getDataLayout(),  in getValueFromVirtualReg()
571         unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);  in getValueFromVirtualReg()