Lines Matching refs:LegalOperations
147 bool LegalOperations = false; member in __anon54f00e400111::DAGCombiner
324 TargetLowering::TargetLoweringOpt TLO(DAG, LegalTypes, LegalOperations); in SimplifyDemandedBits()
768 return TLI.isOperationLegalOrCustom(Opcode, VT, LegalOperations); in hasOperation()
1227 TargetLowering::TargetLoweringOpt TLO(DAG, LegalTypes, LegalOperations); in SimplifyDemandedBits()
1246 TargetLowering::TargetLoweringOpt TLO(DAG, LegalTypes, LegalOperations); in SimplifyDemandedVectorElts()
1345 if (!LegalOperations) in PromoteIntBinOp()
1413 if (!LegalOperations) in PromoteIntShiftOp()
1462 if (!LegalOperations) in PromoteExtend()
1490 if (!LegalOperations) in PromoteLoad()
1573 LegalOperations = Level >= AfterLegalizeVectorOps; in Run()
2472 if ((!LegalOperations || in visitADDLike()
2659 if ((!LegalOperations || TLI.isOperationLegal(ISD::OR, VT)) && in visitADD()
3060 if (!LegalOperations || in visitADDCARRY()
3099 if (!LegalOperations || in visitSADDO_CARRY()
3359 !(!LegalOperations || hasOperation(ISD::USUBSAT, DstVT))) in foldSubToUSubSat()
3406 SelectionDAG &DAG, bool LegalOperations) { in tryFoldToZero() argument
3409 if (!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) in tryFoldToZero()
3429 return tryFoldToZero(DL, TLI, VT, DAG, LegalOperations); in visitSUB()
3466 if (!LegalOperations || TLI.isOperationLegal(NewSh, VT)) in visitSUB()
3695 if (!LegalOperations && TLI.isOffsetFoldingLegal(GA)) { in visitSUB()
3733 if (!LegalOperations && N1.getOpcode() == ISD::SRL && N1.hasOneUse()) { in visitSUB()
3899 if (!LegalOperations || in visitSUBCARRY()
3914 if (!LegalOperations || in visitSSUBO_CARRY()
4143 if ((!LegalOperations || TLI.isOperationLegalOrCustom(ISD::AND, VT)) && in visitMUL()
4834 if (!HiExists && (!LegalOperations || in SimplifyNodeWithTwoResults()
4842 if (!LoExists && (!LegalOperations || in SimplifyNodeWithTwoResults()
4858 (!LegalOperations || in SimplifyNodeWithTwoResults()
4868 (!LegalOperations || in SimplifyNodeWithTwoResults()
5275 if ((VT.isVector() || LegalOperations) && in hoistLogicOpWithSameOpcodeHands()
5298 if (LegalOperations && !TLI.isOperationLegal(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
5379 ShOp = tryFoldToZero(DL, TLI, VT, DAG, LegalOperations); in hoistLogicOpWithSameOpcodeHands()
5392 ShOp = tryFoldToZero(DL, TLI, VT, DAG, LegalOperations); in hoistLogicOpWithSameOpcodeHands()
5424 if (LegalOperations || VT.getScalarType() != MVT::i1) in foldLogicOfSetCCs()
5541 (!LegalOperations || in foldLogicOfSetCCs()
5661 (!LegalOperations || in isAndLoadExtLoad()
5677 if (LegalOperations && in isAndLoadExtLoad()
5740 if (LegalOperations && in isLegalNarrowLdSt()
5768 if (LegalOperations && in isLegalNarrowLdSt()
6364 (!LegalOperations || TLI.isOperationLegal(ISD::ZERO_EXTEND, ExtVT))) { in visitAND()
6462 ((!LegalOperations && LN0->isSimple()) || in visitAND()
6521 if (!LegalOperations) in MatchBSwapHWordLow()
6791 if (!LegalOperations) in MatchBSwapHWord()
6860 if (!LegalOperations && (N0.isUndef() || N1.isUndef())) in visitORLike()
7110 if ((!LegalOperations || TLI.isOperationLegal(ISD::ADD, VT)) && in visitOR()
7516 if (LegalOperations && !HasROTL && !HasROTR && !HasFSHL && !HasFSHR) in MatchRotate()
7667 bool UseROTL = !LegalOperations || HasROTL; in MatchRotate()
7671 bool UseFSHL = !LegalOperations || HasFSHL; in MatchRotate()
7935 if (LegalOperations || OptLevel == CodeGenOpt::None) in mergeTruncStores()
8232 if (LegalOperations && in MatchLoadCombine()
8264 if (NeedsBswap && (LegalOperations || NeedsZext) && in MatchLoadCombine()
8270 if (NeedsBswap && NeedsZext && LegalOperations && in MatchLoadCombine()
8298 SDLoc(N), LegalOperations)) in MatchLoadCombine()
8450 if ((!LegalOperations || TLI.isOperationLegal(ISD::ADD, VT)) && in visitXOR()
8462 if (!LegalOperations || in visitXOR()
8567 return tryFoldToZero(DL, TLI, VT, DAG, LegalOperations); in visitXOR()
9257 if (!LegalOperations || in visitSRA()
9827 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::SHL, VT)) { in visitSHLSAT()
9937 (!LegalOperations || hasOperation(ISD::BSWAP, HalfVT))) { in visitBSWAP()
9988 if (!LegalOperations || TLI.isOperationLegal(ISD::CTLZ_ZERO_UNDEF, VT)) { in visitCTLZ()
10015 if (!LegalOperations || TLI.isOperationLegal(ISD::CTTZ_ZERO_UNDEF, VT)) { in visitCTTZ()
10161 if (CondVT == MVT::i1 && !LegalOperations) { in foldSelectOfConstants()
10468 if (!LegalOperations && TLI.isOperationLegalOrCustom(ISD::UADDO, VT) && in visitSELECT()
10493 (!LegalOperations && in visitSELECT()
10706 MST->getMemoryVT(), LegalOperations)) { in visitMSTORE()
11598 (LegalOperations && !TLI.isOperationLegal(N0.getOpcode(), VT))) in CombineZExtLogicopShiftLoad()
11605 (LegalOperations && !TLI.isOperationLegal(N1.getOpcode(), VT))) in CombineZExtLogicopShiftLoad()
11676 if (LegalOperations || !TLI.isOperationLegalOrCustom(ISD::VSELECT, VT)) in matchVSelectOpSizesWithSetCC()
11710 bool LegalOperations, SDNode *N, in tryToFoldExtOfExtload() argument
11721 if ((LegalOperations || !LN0->isSimple() || in tryToFoldExtOfExtload()
11741 bool LegalOperations, SDNode *N, SDValue N0, in tryToFoldExtOfLoad() argument
11749 ((LegalOperations || VT.isFixedLengthVector() || in tryToFoldExtOfLoad()
11811 bool LegalOperations) { in foldExtendedSignBitTest() argument
11816 if (LegalOperations || SetCC.getOpcode() != ISD::SETCC || in foldExtendedSignBitTest()
11864 if (VT.isVector() && !LegalOperations && in foldSextSetcc()
11962 (!LegalOperations || TLI.isOperationLegal(ISD::SETCC, N00VT))) { in foldSextSetcc()
12027 if (!LegalOperations || TLI.isOperationLegal(ISD::SIGN_EXTEND_INREG, in visitSIGN_EXTEND()
12040 tryToFoldExtOfLoad(DAG, *this, TLI, VT, LegalOperations, N, N0, in visitSIGN_EXTEND()
12056 DAG, *this, TLI, VT, LegalOperations, N, N0, ISD::SEXTLOAD)) in visitSIGN_EXTEND()
12065 (!LegalOperations && TLI.isOperationLegal(N0.getOpcode(), VT))) { in visitSIGN_EXTEND()
12103 if (SDValue V = foldExtendedSignBitTest(N, DAG, LegalOperations)) in visitSIGN_EXTEND()
12110 if ((!LegalOperations || TLI.isOperationLegal(ISD::ZERO_EXTEND, VT)) && in visitSIGN_EXTEND()
12139 (!LegalOperations || (TLI.isOperationLegal(ISD::ZERO_EXTEND, VT) && in visitSIGN_EXTEND()
12275 if (!LegalOperations || (TLI.isOperationLegal(ISD::AND, SrcVT) && in visitZERO_EXTEND()
12287 if (!LegalOperations || TLI.isOperationLegal(ISD::AND, VT)) { in visitZERO_EXTEND()
12316 tryToFoldExtOfLoad(DAG, *this, TLI, VT, LegalOperations, N, N0, in visitZERO_EXTEND()
12338 (!LegalOperations && TLI.isOperationLegal(N0.getOpcode(), VT))) { in visitZERO_EXTEND()
12395 DAG, *this, TLI, VT, LegalOperations, N, N0, ISD::ZEXTLOAD)) in visitZERO_EXTEND()
12398 if (SDValue V = foldExtendedSignBitTest(N, DAG, LegalOperations)) in visitZERO_EXTEND()
12406 if (!LegalOperations && VT.isVector() && in visitZERO_EXTEND()
12544 tryToFoldExtOfLoad(DAG, *this, TLI, VT, LegalOperations, N, N0, in visitANY_EXTEND()
12584 if (!LegalOperations || TLI.isLoadExtLegal(ExtType, VT, MemVT)) { in visitANY_EXTEND()
12604 if (VT.isVector() && !LegalOperations) { in visitANY_EXTEND()
13008 (!LegalOperations || TLI.isOperationLegal(ISD::SIGN_EXTEND, VT))) in visitSIGN_EXTEND_INREG()
13027 (!LegalOperations || in visitSIGN_EXTEND_INREG()
13037 (!LegalOperations || TLI.isOperationLegal(ISD::SIGN_EXTEND, VT))) in visitSIGN_EXTEND_INREG()
13077 ((!LegalOperations && cast<LoadSDNode>(N0)->isSimple() && in visitSIGN_EXTEND_INREG()
13095 ((!LegalOperations && cast<LoadSDNode>(N0)->isSimple()) && in visitSIGN_EXTEND_INREG()
13233 LegalTypes && !LegalOperations && N0->hasOneUse() && VT != MVT::i1) { in visitTRUNCATE()
13259 if ((!LegalOperations || TLI.isOperationLegal(ISD::SELECT, SrcVT)) && in visitTRUNCATE()
13271 (!LegalOperations || TLI.isOperationLegal(ISD::SHL, VT)) && in visitTRUNCATE()
13293 if (N0.getOpcode() == ISD::BUILD_VECTOR && !LegalOperations && in visitTRUNCATE()
13409 (!LegalOperations || in visitTRUNCATE()
13465 if (!LegalOperations && N0.hasOneUse() && in visitTRUNCATE()
13485 if (((!LegalOperations && N0.getOpcode() == ISD::ADDCARRY) || in visitTRUNCATE()
13499 if (!LegalOperations && N0.hasOneUse() && in visitTRUNCATE()
13542 if ((!LegalOperations || TLI.isOperationLegal(ISD::LOAD, VT)) && in CombineConsecutiveLoads()
13626 (!LegalOperations && VT.isInteger() && N0.getValueType().isInteger() && in visitBITCAST()
13638 if (!LegalOperations || in visitBITCAST()
13664 ((!LegalOperations && cast<LoadSDNode>(N0)->isSimple()) || in visitBITCAST()
13981 bool HasFMAD = (LegalOperations && TLI.isFMADLegal(DAG, N)); in visitFADDForFMACombine()
13986 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FMA, VT)); in visitFADDForFMACombine()
14194 bool HasFMAD = (LegalOperations && TLI.isFMADLegal(DAG, N)); in visitFSUBForFMACombine()
14199 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FMA, VT)); in visitFSUBForFMACombine()
14521 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FMA, VT)); in visitFMULForFMADistributiveCombine()
14526 (LegalOperations && TLI.isFMADLegal(DAG, N)); in visitFMULForFMADistributiveCombine()
14630 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FSUB, VT)) in visitFADD()
14632 N1, DAG, LegalOperations, ForCodeSize)) in visitFADD()
14636 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FSUB, VT)) in visitFADD()
14638 N0, DAG, LegalOperations, ForCodeSize)) in visitFADD()
14784 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::STRICT_FSUB, VT)) in visitSTRICT_FADD()
14786 N1, DAG, LegalOperations, ForCodeSize)) { in visitSTRICT_FADD()
14792 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::STRICT_FSUB, VT)) in visitSTRICT_FADD()
14794 N0, DAG, LegalOperations, ForCodeSize)) { in visitSTRICT_FADD()
14852 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize)) in visitFSUB()
14854 if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT)) in visitFSUB()
14873 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize)) in visitFSUB()
14946 if (!LegalOperations || TLI.isOperationLegal(ISD::FSUB, VT)) { in visitFMUL()
14958 TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0); in visitFMUL()
14960 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1); in visitFMUL()
15049 TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0); in visitFMA()
15051 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1); in visitFMA()
15100 (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT))) { in visitFMA()
15136 SDValue(N, 0), DAG, LegalOperations, ForCodeSize)) in visitFMA()
15258 (!LegalOperations || in visitFDIV()
15352 TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0); in visitFDIV()
15354 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1); in visitFDIV()
15449 if (!LegalOperations || TLI.isOperationLegal(ISD::FABS, VT)) in visitFCOPYSIGN()
15452 if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT)) in visitFCOPYSIGN()
15597 (!LegalOperations || in visitSINT_TO_FP()
15614 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::ConstantFP, VT))) { in visitSINT_TO_FP()
15624 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::ConstantFP, VT))) { in visitSINT_TO_FP()
15649 (!LegalOperations || in visitUINT_TO_FP()
15664 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::ConstantFP, VT))) { in visitUINT_TO_FP()
15913 TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize)) in visitFNEG()
18948 if ((isTypeLegal(MVT::i32) && !LegalOperations && ST->isSimple()) || in replaceStoreOfFPConstant()
18958 if ((TLI.isTypeLegal(MVT::i64) && !LegalOperations && in replaceStoreOfFPConstant()
19012 if (((!LegalOperations && ST->isSimple()) || in visitSTORE()
19156 ST->getMemoryVT(), LegalOperations)) { in visitSTORE()
19571 if (!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) { in visitINSERT_VECTOR_ELT()
19725 bool LegalOperations) { in scalarizeExtractedBinop() argument
19824 if (SDValue BO = scalarizeExtractedBinop(N, DAG, LegalOperations)) in visitEXTRACT_VECTOR_ELT()
19909 if (!LegalOperations || in visitEXTRACT_VECTOR_ELT()
19972 if (!LegalOperations && !IndexC && VecOp.hasOneUse() && in visitEXTRACT_VECTOR_ELT()
19982 if (!LegalOperations || !IndexC) in visitEXTRACT_VECTOR_ELT()
20323 if (LegalOperations && in createBuildVecShuffle()
20485 if (LegalOperations && !TLI.isOperationLegal(ISD::VECTOR_SHUFFLE, VT)) in reduceBuildVecToShuffle()
20734 if (LegalOperations) in convertBuildVecZextToZext()
20797 if (!LegalOperations) { in visitBUILD_VECTOR()
21136 if (!LegalOperations && Scalar.getOpcode() == ISD::SCALAR_TO_VECTOR && in visitCONCAT_VECTORS()
21307 bool LegalOperations) { in narrowInsertExtractVectorBinOp() argument
21321 if (!TLI.isOperationLegalOrCustom(BinOpcode, SubVT, LegalOperations)) in narrowInsertExtractVectorBinOp()
21343 bool LegalOperations) { in narrowExtractedVectorBinOp() argument
21347 if (SDValue V = narrowInsertExtractVectorBinOp(Extract, DAG, LegalOperations)) in narrowExtractedVectorBinOp()
21537 bool LegalOperations) { in foldExtractSubvectorFromShuffleVector() argument
21559 if (LegalOperations && in foldExtractSubvectorFromShuffleVector()
21704 if (!LegalOperations || TLI.isOperationLegal(ISD::SPLAT_VECTOR, NVT)) in visitEXTRACT_SUBVECTOR()
21711 (!LegalOperations || TLI.isOperationLegal(ISD::BITCAST, NVT))) { in visitEXTRACT_SUBVECTOR()
21797 foldExtractSubvectorFromShuffleVector(N, DAG, TLI, LegalOperations)) in visitEXTRACT_SUBVECTOR()
21850 if (LegalOperations && !TLI.isOperationLegal(ISD::BITCAST, NVT)) in visitEXTRACT_SUBVECTOR()
21861 if (SDValue NarrowBOp = narrowExtractedVectorBinOp(N, DAG, LegalOperations)) in visitEXTRACT_SUBVECTOR()
22086 bool LegalOperations) { in combineShuffleToVectorExtend() argument
22125 if (!LegalOperations || in combineShuffleToVectorExtend()
22263 bool LegalOperations) { in combineShuffleOfBitcast() argument
22281 (LegalOperations && in combineShuffleOfBitcast()
22534 if ((!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) && in visitVECTOR_SHUFFLE()
22603 if (SDValue V = combineShuffleToVectorExtend(SVN, DAG, TLI, LegalOperations)) in visitVECTOR_SHUFFLE()
22827 if (SDValue V = combineShuffleOfBitcast(SVN, DAG, TLI, LegalOperations)) in visitVECTOR_SHUFFLE()
23414 if (LegalOperations) in XformToShuffleWithZero()
23612 LegalOperations)) { in SimplifyVBinOp()
24174 (!LegalOperations || TLI.isOperationLegal(ISD::SETCC, CmpOpVT))) { in SimplifySelectCC()
24237 (!LegalOperations || TLI.isOperationLegal(ISD::CTTZ, VT))) in SimplifySelectCC()
24244 (!LegalOperations || TLI.isOperationLegal(ISD::CTLZ, VT))) in SimplifySelectCC()
24292 if (SDValue S = TLI.BuildSDIV(N, DAG, LegalOperations, Built)) { in BuildSDIV()
24333 if (SDValue S = TLI.BuildUDIV(N, DAG, LegalOperations, Built)) { in BuildUDIV()