592       LiveRegMap::iterator LRI = findLiveVirtReg(VirtReg);  in displacePhysReg()  local
593       assert(LRI != LiveVirtRegs.end() && "datastructures in sync");  in displacePhysReg()
596       reload(ReloadBefore, VirtReg, LRI->PhysReg);  in displacePhysReg()
598       setPhysRegState(LRI->PhysReg, regFree);  in displacePhysReg()
599       LRI->PhysReg = 0;  in displacePhysReg()
600       LRI->Reloaded = true;  in displacePhysReg()
628       LiveRegMap::iterator LRI = findLiveVirtReg(VirtReg);  in freePhysReg()  local
629       assert(LRI != LiveVirtRegs.end());  in freePhysReg()
630       LLVM_DEBUG(dbgs() << ' ' << printReg(LRI->VirtReg, TRI) << '\n');  in freePhysReg()
631       setPhysRegState(LRI->PhysReg, regFree);  in freePhysReg()
632       LRI->PhysReg = 0;  in freePhysReg()
846   LiveRegMap::const_iterator LRI = findLiveVirtReg(VirtReg);  in allocVirtRegUndef()  local
848   if (LRI != LiveVirtRegs.end() && LRI->PhysReg) {  in allocVirtRegUndef()
849     PhysReg = LRI->PhysReg;  in allocVirtRegUndef()
870   LiveRegMap::iterator LRI = findLiveVirtReg(VirtReg);  in defineLiveThroughVirtReg()  local
871   if (LRI != LiveVirtRegs.end()) {  in defineLiveThroughVirtReg()
872     MCPhysReg PrevReg = LRI->PhysReg;  in defineLiveThroughVirtReg()
877       LRI->PhysReg = 0;  in defineLiveThroughVirtReg()
878       allocVirtReg(MI, *LRI, 0, true);  in defineLiveThroughVirtReg()
881       LLVM_DEBUG(dbgs() << "Copy " << printReg(LRI->PhysReg, TRI) << " to "  in defineLiveThroughVirtReg()
885         .addReg(LRI->PhysReg, llvm::RegState::Kill);  in defineLiveThroughVirtReg()
889       LRI->LastUse = &MI;  in defineLiveThroughVirtReg()
904   LiveRegMap::iterator LRI;  in defineVirtReg()  local
906   std::tie(LRI, New) = LiveVirtRegs.insert(LiveReg(VirtReg));  in defineVirtReg()
910         LRI->LiveOut = true;  in defineVirtReg()
917   if (LRI->PhysReg == 0)  in defineVirtReg()
918     allocVirtReg(MI, *LRI, 0, LookAtPhysRegUses);  in defineVirtReg()
920     assert(!isRegUsedInInstr(LRI->PhysReg, LookAtPhysRegUses) &&  in defineVirtReg()
924                       << printReg(LRI->PhysReg, TRI) << '\n');  in defineVirtReg()
927   MCPhysReg PhysReg = LRI->PhysReg;  in defineVirtReg()
929   if (LRI->Reloaded || LRI->LiveOut) {  in defineVirtReg()
933       LLVM_DEBUG(dbgs() << "Spill Reason: LO: " << LRI->LiveOut << " RL: "  in defineVirtReg()
934                         << LRI->Reloaded << '\n');  in defineVirtReg()
935       bool Kill = LRI->LastUse == nullptr;  in defineVirtReg()
936       spill(SpillBefore, VirtReg, PhysReg, Kill, LRI->LiveOut);  in defineVirtReg()
937       LRI->LastUse = nullptr;  in defineVirtReg()
939     LRI->LiveOut = false;  in defineVirtReg()
940     LRI->Reloaded = false;  in defineVirtReg()
954   LiveRegMap::iterator LRI;  in useVirtReg()  local
956   std::tie(LRI, New) = LiveVirtRegs.insert(LiveReg(VirtReg));  in useVirtReg()
961         LRI->LiveOut = true;  in useVirtReg()
968     assert((!MO.isKill() || LRI->LastUse == &MI) && "Invalid kill flag");  in useVirtReg()
972   if (LRI->PhysReg == 0) {  in useVirtReg()
980     allocVirtReg(MI, *LRI, Hint, false);  in useVirtReg()
981     if (LRI->Error) {  in useVirtReg()
989   LRI->LastUse = &MI;  in useVirtReg()
992     BundleVirtRegsMap[VirtReg] = LRI->PhysReg;  in useVirtReg()
994   markRegUsedInInstr(LRI->PhysReg);  in useVirtReg()
995   setPhysReg(MI, MO, LRI->PhysReg);  in useVirtReg()
1435     LiveRegMap::iterator LRI = findLiveVirtReg(Reg);  in handleDebugValue()  local
1440     if (LRI != LiveVirtRegs.end() && LRI->PhysReg) {  in handleDebugValue()
1443         setPhysReg(MI, *RegMO, LRI->PhysReg);  in handleDebugValue()