85         MachineInstr *UseMI = UseOp.getParent();  in expand()  local
86         int UseStage = Schedule.getStage(UseMI);  in expand()
1131     MachineInstr *UseMI = UseOp.getParent();  in rewriteScheduledInstr()  local
1132     if (UseMI->getParent() != BB)  in rewriteScheduledInstr()
1134     if (UseMI->isPHI()) {  in rewriteScheduledInstr()
1135       if (!Phi->isPHI() && UseMI->getOperand(0).getReg() == NewReg)  in rewriteScheduledInstr()
1137       if (getLoopPhiReg(*UseMI, BB) != OldReg)  in rewriteScheduledInstr()
1140     InstrMapTy::iterator OrigInstr = InstrMap.find(UseMI);  in rewriteScheduledInstr()
1172         BuildMI(*BB, UseMI, UseMI->getDebugLoc(), TII->get(TargetOpcode::COPY),  in rewriteScheduledInstr()
1602       for (MachineInstr &UseMI : MRI.use_instructions(DefMO.getReg())) {  in filterInstructions()
1605         assert(UseMI.isPHI());  in filterInstructions()
1606         Register Reg = getEquivalentRegisterIn(UseMI.getOperand(0).getReg(),  in filterInstructions()
1608         Subs.emplace_back(&UseMI, Reg);  in filterInstructions()
1916     for (MachineInstr &UseMI : MRI.use_instructions(DefMO.getReg())) {  in rewriteUsesOf()
1919       assert(UseMI.isPHI());  in rewriteUsesOf()
1920       Register Reg = getEquivalentRegisterIn(UseMI.getOperand(0).getReg(),  in rewriteUsesOf()
1922       Subs.emplace_back(&UseMI, Reg);  in rewriteUsesOf()