Lines Matching refs:NewReg

396       unsigned NewReg = VRMap[PrevStage][LoopVal];  in generateExistingPhis()  local
398 InitVal, NewReg); in generateExistingPhis()
411 unsigned NewReg = 0; in generateExistingPhis() local
511 NewReg = PhiOp2; in generateExistingPhis()
518 NewReg = VRMap[ReuseStage - np][LoopVal]; in generateExistingPhis()
521 Def, NewReg); in generateExistingPhis()
523 VRMap[CurStageNum - np][Def] = NewReg; in generateExistingPhis()
524 PhiOp2 = NewReg; in generateExistingPhis()
529 replaceRegUsesAfterLoop(Def, NewReg, BB, MRI, LIS); in generateExistingPhis()
540 NewReg = MRI.createVirtualRegister(RC); in generateExistingPhis()
544 TII->get(TargetOpcode::PHI), NewReg); in generateExistingPhis()
557 NewReg, PrevReg); in generateExistingPhis()
562 NewReg); in generateExistingPhis()
569 replaceRegUsesAfterLoop(Def, NewReg, BB, MRI, LIS); in generateExistingPhis()
573 PhiOp2 = NewReg; in generateExistingPhis()
576 VRMap[CurStageNum - np][Def] = NewReg; in generateExistingPhis()
581 NewReg, 0); in generateExistingPhis()
656 Register NewReg = MRI.createVirtualRegister(RC); in generatePhis() local
660 TII->get(TargetOpcode::PHI), NewReg); in generatePhis()
670 NewReg); in generatePhis()
672 NewReg); in generatePhis()
674 PhiOp2 = NewReg; in generatePhis()
675 VRMap[PrevStage - np - 1][Def] = NewReg; in generatePhis()
677 VRMap[CurStageNum - np][Def] = NewReg; in generatePhis()
680 NewReg); in generatePhis()
683 replaceRegUsesAfterLoop(Def, NewReg, BB, MRI, LIS); in generatePhis()
1019 Register NewReg = MRI.createVirtualRegister(RC); in updateInstruction() local
1020 MO.setReg(NewReg); in updateInstruction()
1021 VRMap[CurStageNum][reg] = NewReg; in updateInstruction()
1023 replaceRegUsesAfterLoop(reg, NewReg, BB, MRI, LIS); in updateInstruction()
1123 unsigned PhiNum, MachineInstr *Phi, unsigned OldReg, unsigned NewReg, in rewriteScheduledInstr() argument
1135 if (!Phi->isPHI() && UseMI->getOperand(0).getReg() == NewReg) in rewriteScheduledInstr()
1155 ReplaceReg = NewReg; in rewriteScheduledInstr()
1160 ReplaceReg = NewReg; in rewriteScheduledInstr()
1162 ReplaceReg = NewReg; in rewriteScheduledInstr()
1164 ReplaceReg = NewReg; in rewriteScheduledInstr()