617       OrderedInsts.push_back(SU->getInstr());  in schedule()
618       Cycles[SU->getInstr()] = Cycle;  in schedule()
619       Stages[SU->getInstr()] = Schedule.stageScheduled(SU);  in schedule()
745     MachineInstr &MI = *SU.getInstr();  in addLoopCarriedDependences()
770           MachineInstr &LdMI = *Load->getInstr();  in addLoopCarriedDependences()
846     MachineInstr *MI = I.getInstr();  in updatePhiDependences()
902       MachineInstr *PMI = PI.getSUnit()->getInstr();  in updatePhiDependences()
904         if (I.getInstr()->isPHI()) {  in updatePhiDependences()
927     if (!canUseLastOffsetValue(I.getInstr(), BasePos, OffsetPos, NewBase,  in changeDependences()
932     Register OrigBase = I.getInstr()->getOperand(BasePos).getReg();  in changeDependences()
1237           (SI.getKind() == SDep::Anti && !SI.getSUnit()->getInstr()->isPHI()))  in createAdjacencyStructure()
1248       if (!SUnits[i].getInstr()->mayStore() ||  in createAdjacencyStructure()
1251       if (PI.getKind() == SDep::Order && PI.getSUnit()->getInstr()->mayLoad()) {  in createAdjacencyStructure()
1362     if (!SU.getInstr()->isCopy() && !SU.getInstr()->isRegSequence())  in apply()
1372       MachineInstr *TmpMI = TmpSU->getInstr();  in apply()
1396         MachineInstr *TmpMI = TmpSU->getInstr();  in apply()
1602     const MachineInstr *MI = SU->getInstr();  in computeLiveOuts()
1617     for (const MachineOperand &MO : SU->getInstr()->operands())  in computeLiveOuts()
1658       MachineBasicBlock::const_iterator CurInstI = SU->getInstr();  in registerPressureFilter()
1663       RecRPTracker.getMaxUpwardPressureDelta(SU->getInstr(), nullptr, RPDelta,  in registerPressureFilter()
2042         SU->getInstr()->dump();  in schedulePipeline()
2065         if (SU->getInstr()->isPHI())  in schedulePipeline()
2284   MachineInstr *SI = Source->getInstr();  in isLoopCarriedDep()
2285   MachineInstr *DI = Dep.getSUnit()->getInstr();  in isLoopCarriedDep()
2380         if (ST.getInstrInfo()->isZeroCost(CI->getInstr()->getOpcode()))  in insert()
2382         assert(ProcItinResources.canReserveResources(*CI->getInstr()) &&  in insert()
2384         ProcItinResources.reserveResources(*CI->getInstr());  in insert()
2387     if (ST.getInstrInfo()->isZeroCost(SU->getInstr()->getOpcode()) ||  in insert()
2388         ProcItinResources.canReserveResources(*SU->getInstr())) {  in insert()
2391         SU->getInstr()->dump();  in insert()
2404       SU->getInstr()->dump();  in insert()
2461     if (DAG->isBackedge(SU, P) && P.getSUnit()->getInstr()->isPHI())  in multipleIterations()
2463         if (S.getKind() == SDep::Data && S.getSUnit()->getInstr()->isPHI())  in multipleIterations()
2502         if (BE && Dep.getSUnit() == BE && !SU->getInstr()->isPHI() &&  in computeStart()
2533   MachineInstr *MI = SU->getInstr();  in orderDependence()
2556           (*I)->getInstr()->readsWritesVirtualRegister(Reg);  in orderDependence()
2588                  isLoopCarriedDefOfUse(SSD, (*I)->getInstr(), MO)) {  in orderDependence()
2673   if (UseSU->getInstr()->isPHI())  in isLoopCarried()
2716     if (SU.isInstr() && PLI->shouldIgnoreForPipelining(SU.getInstr()))  in computeUnpipelineableNodes()
2727     if (SU->getInstr()->isPHI())  in computeUnpipelineableNodes()
2763                         << " to " << NewCycle << " Instr:" << *SU.getInstr());  in normalizeNonPipelinedInstructions()
2847       if (!PredSU->getInstr()->isPHI() && PredIndex < Index) {  in checkValidNodeOrder()
2863       if (!SuccSU->getInstr()->isPHI() && SuccIndex < Index) {  in checkValidNodeOrder()
2870     if (PredBefore && SuccBefore && !SU->getInstr()->isPHI()) {  in checkValidNodeOrder()
2904     MachineInstr *MI = SU->getInstr();  in fixupRegisterOverlaps()
2969     SSD->applyInstrChange(SU.getInstr(), *this);  in finalizeSchedule()
2977       if (SU->getInstr()->isPHI())  in finalizeSchedule()
2982       if (!SU->getInstr()->isPHI())  in finalizeSchedule()
2998     os << "   SU(" << I->NodeNum << ") " << *(I->getInstr());  in print()
3012       CI->getInstr()->print(os);  in print()