163     AtomicOrdering Ordering = AtomicOrdering::SequentiallyConsistent) {  in MakeBinaryAtomicValue()
248       Kind, Args[0], Args[1], llvm::AtomicOrdering::SequentiallyConsistent);  in EmitBinaryAtomicPost()
290       Args[0], Args[1], Args[2], llvm::AtomicOrdering::SequentiallyConsistent,  in MakeAtomicCmpXchgValue()
291       llvm::AtomicOrdering::SequentiallyConsistent);  in MakeAtomicCmpXchgValue()
317     AtomicOrdering SuccessOrdering = AtomicOrdering::SequentiallyConsistent) {  in EmitAtomicCmpXchgForMSIntrin()
409     AtomicOrdering Ordering = AtomicOrdering::SequentiallyConsistent) {  in EmitAtomicIncrementValue()
422     AtomicOrdering Ordering = AtomicOrdering::SequentiallyConsistent) {  in EmitAtomicDecrementValue()
932   case BitTest::Sequential: return llvm::AtomicOrdering::SequentiallyConsistent;  in getBitTestAtomicOrdering()
1590         *this, E, AtomicOrdering::SequentiallyConsistent);  in EmitMSVCBuiltinExpr()
3954     Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent);  in EmitBuiltinExpr()
4023             llvm::AtomicOrdering::SequentiallyConsistent);  in EmitBuiltinExpr()
4042         llvm::AtomicOrdering::SequentiallyConsistent};  in EmitBuiltinExpr()
4091         Store->setOrdering(llvm::AtomicOrdering::SequentiallyConsistent);  in EmitBuiltinExpr()
4106         llvm::AtomicOrdering::SequentiallyConsistent};  in EmitBuiltinExpr()
4154         Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, SSID);  in EmitBuiltinExpr()
4187     Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, SSID);  in EmitBuiltinExpr()
4527       AtomicOrdering::Monotonic : AtomicOrdering::SequentiallyConsistent;  in EmitBuiltinExpr()
9751     return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent,  in EmitAArch64BuiltinExpr()
10757       llvm::AtomicOrdering::SequentiallyConsistent);  in EmitAArch64BuiltinExpr()
14998     return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent,  in EmitX86BuiltinExpr()
15016     return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent,  in EmitX86BuiltinExpr()
16527       AO = llvm::AtomicOrdering::SequentiallyConsistent;  in ProcessOrderScopeAMDGCN()
16544   llvm::AtomicOrdering AO = llvm::AtomicOrdering::SequentiallyConsistent;  in EmitAMDGPUBuiltinExpr()
17809                                    AtomicOrdering::SequentiallyConsistent);  in EmitNVPTXBuiltinExpr()