685 		CSR_WRITE_2(sc_if->msk_softc,  in msk_rx_fill()
750 	CSR_WRITE_2(sc_if->msk_softc,  in msk_init_rx_ring()
818 	CSR_WRITE_2(sc_if->msk_softc,  in msk_init_jumbo_rx_ring()
1292 			CSR_WRITE_2(sc, B0_CTST, Y2_HW_WOL_ON);  in msk_phy_power()
1306 			CSR_WRITE_2(sc, MR_ADDR(i, GMAC_LINK_CTRL),  in msk_phy_power()
1308 			CSR_WRITE_2(sc, MR_ADDR(i, GMAC_LINK_CTRL),  in msk_phy_power()
1365 			CSR_WRITE_2(sc, B28_Y2_ASF_HCU_CCSR, status);  in mskc_reset()
1369 		CSR_WRITE_2(sc, B0_CTST, Y2_ASF_DISABLE);  in mskc_reset()
1374 		CSR_WRITE_2(sc, B0_CTST, CS_RST_SET);  in mskc_reset()
1375 		CSR_WRITE_2(sc, B0_CTST, CS_RST_CLR);  in mskc_reset()
1385 	CSR_WRITE_2(sc, B0_CTST, CS_MRST_CLR);  in mskc_reset()
1440 	CSR_WRITE_2(sc, B0_CTST, Y2_LED_STAT_ON);  in mskc_reset()
1464 		CSR_WRITE_2(sc, SELECT_RAM_BUFFER(i, B3_RI_CTRL), RI_RST_SET);  in mskc_reset()
1465 		CSR_WRITE_2(sc, SELECT_RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR);  in mskc_reset()
1533 	CSR_WRITE_2(sc, STAT_LAST_IDX, sc->msk_stat_count - 1);  in mskc_reset()
1537 		CSR_WRITE_2(sc, STAT_TX_IDX_TH, ST_TXTH_IDX_MASK);  in mskc_reset()
1542 		CSR_WRITE_2(sc, STAT_TX_IDX_TH, 0x0a);  in mskc_reset()
1772 	CSR_WRITE_2(sc, B0_CTST, CS_RST_CLR);  in mskc_attach()
2079 	CSR_WRITE_2(sc, B0_CTST, Y2_LED_STAT_OFF);  in mskc_detach()
2082 	CSR_WRITE_2(sc, B0_CTST, CS_RST_SET);  in mskc_detach()
2942 		CSR_WRITE_2(sc_if->msk_softc,  in msk_start_locked()
2996 	CSR_WRITE_2(sc, B0_CTST, CS_RST_SET);  in mskc_shutdown()
3026 	CSR_WRITE_2(sc, B0_CTST, CS_RST_SET);  in mskc_suspend()
3438 		CSR_WRITE_2(sc, SELECT_RAM_BUFFER(sc_if->msk_port, B3_RI_CTRL),  in msk_handle_hwerr()
3445 		CSR_WRITE_2(sc, SELECT_RAM_BUFFER(sc_if->msk_port, B3_RI_CTRL),  in msk_handle_hwerr()
3567 	CSR_WRITE_2(sc, Y2_PREF_Q_ADDR(sc_if->msk_rxq,  in msk_rxput()
3908 	CSR_WRITE_2(sc, MR_ADDR(sc_if->msk_port, RX_GMF_FL_THR), reg);  in msk_init_locked()
3920 		CSR_WRITE_2(sc, MR_ADDR(sc_if->msk_port, RX_GMF_LP_THR),  in msk_init_locked()
3922 		CSR_WRITE_2(sc, MR_ADDR(sc_if->msk_port, RX_GMF_UP_THR),  in msk_init_locked()
3955 	CSR_WRITE_2(sc, Q_ADDR(sc_if->msk_txq, Q_WM), MSK_BMU_TX_WM);  in msk_init_locked()
3960 			CSR_WRITE_2(sc, Q_ADDR(sc_if->msk_txq, Q_AL),  in msk_init_locked()
3979 	CSR_WRITE_2(sc, Q_ADDR(sc_if->msk_rxq, Q_WM), MSK_BMU_RX_WM);  in msk_init_locked()
4121 	CSR_WRITE_2(sc, Y2_PREF_Q_ADDR(qaddr, PREF_UNIT_LAST_IDX_REG),  in msk_set_prefetch()