220 		v = CSR_READ_4(sc, AGE_MDIO);  in age_miibus_readreg()
250 		v = CSR_READ_4(sc, AGE_MDIO);  in age_miibus_writereg()
341 	reg = CSR_READ_4(sc, AGE_SPI_CTRL);  in age_get_macaddr()
353 		CSR_WRITE_4(sc, AGE_TWSI_CTRL, CSR_READ_4(sc, AGE_TWSI_CTRL) |  in age_get_macaddr()
357 			reg = CSR_READ_4(sc, AGE_TWSI_CTRL);  in age_get_macaddr()
370 	ea[0] = CSR_READ_4(sc, AGE_PAR0);  in age_get_macaddr()
371 	ea[1] = CSR_READ_4(sc, AGE_PAR1);  in age_get_macaddr()
497 	sc->age_chip_rev = CSR_READ_4(sc, AGE_MASTER_CFG) >>  in age_attach()
521 	    CSR_READ_4(sc, AGE_SRAM_TX_FIFO_LEN),  in age_attach()
522 	    CSR_READ_4(sc, AGE_SRAM_RX_FIFO_LEN));  in age_attach()
1411 	reg = CSR_READ_4(sc, AGE_MAC_CFG);  in age_setwol()
1869 			reg = CSR_READ_4(sc, AGE_MAC_CFG);  in age_ioctl()
1923 	reg = CSR_READ_4(sc, AGE_MAC_CFG);  in age_mac_config()
1989 		reg = CSR_READ_4(sc, AGE_MAC_CFG);  in age_link_task()
1991 		CSR_WRITE_4(sc, AGE_DMA_CFG, CSR_READ_4(sc, AGE_DMA_CFG) |  in age_link_task()
2107 	status = CSR_READ_4(sc, AGE_INTR_STATUS);  in age_intr()
2522 	CSR_READ_4(sc, AGE_MASTER_CFG);  in age_reset()
2525 		if ((reg = CSR_READ_4(sc, AGE_IDLE_STATUS)) == 0)  in age_reset()
2534 	CSR_WRITE_4(sc, 0x1008, CSR_READ_4(sc, 0x1008) | 0x8000);  in age_reset()
2653 	reg = CSR_READ_4(sc, AGE_MASTER_CFG);  in age_init_locked()
2694 		CSR_WRITE_4(sc, 0x1008, CSR_READ_4(sc, 0x1008) | 0x8000);  in age_init_locked()
2714 		reg = CSR_READ_4(sc, AGE_SRAM_RX_FIFO_LEN);  in age_init_locked()
2721 		reg = CSR_READ_4(sc, AGE_SRAM_RRD_LEN);  in age_init_locked()
2809 	reg = CSR_READ_4(sc, AGE_MAC_CFG);  in age_init_locked()
2861 	    CSR_READ_4(sc, AGE_DMA_CFG) & ~(DMA_CFG_RD_ENB | DMA_CFG_WR_ENB));  in age_stop()
2864 	    CSR_READ_4(sc, AGE_TXQ_CFG) & ~TXQ_CFG_ENB);  in age_stop()
2866 	    CSR_READ_4(sc, AGE_RXQ_CFG) & ~RXQ_CFG_ENB);  in age_stop()
2868 		if ((reg = CSR_READ_4(sc, AGE_IDLE_STATUS)) == 0)  in age_stop()
2915 	reg = CSR_READ_4(sc, AGE_MAC_CFG);  in age_stop_txmac()
2921 	reg = CSR_READ_4(sc, AGE_DMA_CFG);  in age_stop_txmac()
2927 		if ((CSR_READ_4(sc, AGE_IDLE_STATUS) &  in age_stop_txmac()
2944 	reg = CSR_READ_4(sc, AGE_MAC_CFG);  in age_stop_rxmac()
2950 	reg = CSR_READ_4(sc, AGE_DMA_CFG);  in age_stop_rxmac()
2956 		if ((CSR_READ_4(sc, AGE_IDLE_STATUS) &  in age_stop_rxmac()
3117 	reg = CSR_READ_4(sc, AGE_MAC_CFG);  in age_rxvlan()
3147 	rxcfg = CSR_READ_4(sc, AGE_MAC_CFG);  in age_rxfilter()