49 #define __mlx5_nullp(typ) ((struct mlx5_ifc_##typ##_bits *)0)  argument
50 #define __mlx5_bit_sz(typ, fld) sizeof(__mlx5_nullp(typ)->fld)  argument
51 #define __mlx5_bit_off(typ, fld) __offsetof(struct mlx5_ifc_##typ##_bits, fld)  argument
52 #define __mlx5_16_off(typ, fld) (__mlx5_bit_off(typ, fld) / 16)  argument
53 #define __mlx5_dw_off(typ, fld) (__mlx5_bit_off(typ, fld) / 32)  argument
54 #define __mlx5_64_off(typ, fld) (__mlx5_bit_off(typ, fld) / 64)  argument
55 #define __mlx5_16_bit_off(typ, fld) (16 - __mlx5_bit_sz(typ, fld) - (__mlx5_bit_off(typ, fld) & 0xf…  argument
56 #define __mlx5_dw_bit_off(typ, fld) (32 - __mlx5_bit_sz(typ, fld) - (__mlx5_bit_off(typ, fld) & 0x1…  argument
57 #define __mlx5_mask(typ, fld) ((u32)((1ull << __mlx5_bit_sz(typ, fld)) - 1))  argument
58 #define __mlx5_dw_mask(typ, fld) (__mlx5_mask(typ, fld) << __mlx5_dw_bit_off(typ, fld))  argument
59 #define __mlx5_mask16(typ, fld) ((u16)((1ull << __mlx5_bit_sz(typ, fld)) - 1))  argument
60 #define __mlx5_16_mask(typ, fld) (__mlx5_mask16(typ, fld) << __mlx5_16_bit_off(typ, fld))  argument
61 #define __mlx5_st_sz_bits(typ) sizeof(struct mlx5_ifc_##typ##_bits)  argument
63 #define MLX5_FLD_SZ_BYTES(typ, fld) (__mlx5_bit_sz(typ, fld) / 8)  argument
64 #define MLX5_ST_SZ_BYTES(typ) (sizeof(struct mlx5_ifc_##typ##_bits) / 8)  argument
65 #define MLX5_ST_SZ_DW(typ) (sizeof(struct mlx5_ifc_##typ##_bits) / 32)  argument
66 #define MLX5_ST_SZ_QW(typ) (sizeof(struct mlx5_ifc_##typ##_bits) / 64)  argument
67 #define MLX5_UN_SZ_BYTES(typ) (sizeof(union mlx5_ifc_##typ##_bits) / 8)  argument
68 #define MLX5_UN_SZ_DW(typ) (sizeof(union mlx5_ifc_##typ##_bits) / 32)  argument
69 #define MLX5_BYTE_OFF(typ, fld) (__mlx5_bit_off(typ, fld) / 8)  argument
70 #define MLX5_ADDR_OF(typ, p, fld) ((char *)(p) + MLX5_BYTE_OFF(typ, fld))  argument
73 #define MLX5_SET(typ, p, fld, v) do { \  argument
74 	BUILD_BUG_ON(__mlx5_st_sz_bits(typ) % 32);             \
75 	BUILD_BUG_ON(__mlx5_bit_sz(typ, fld) > 32); \
76 	*((__be32 *)(p) + __mlx5_dw_off(typ, fld)) = \
77 	cpu_to_be32((be32_to_cpu(*((__be32 *)(p) + __mlx5_dw_off(typ, fld))) & \
78 		     (~__mlx5_dw_mask(typ, fld))) | (((v) & __mlx5_mask(typ, fld)) \
79 		     << __mlx5_dw_bit_off(typ, fld))); \
82 #define MLX5_SET_TO_ONES(typ, p, fld) do { \  argument
83 	BUILD_BUG_ON(__mlx5_st_sz_bits(typ) % 32);             \
84 	BUILD_BUG_ON(__mlx5_bit_sz(typ, fld) > 32); \
85 	*((__be32 *)(p) + __mlx5_dw_off(typ, fld)) = \
86 	cpu_to_be32((be32_to_cpu(*((__be32 *)(p) + __mlx5_dw_off(typ, fld))) & \
87 		     (~__mlx5_dw_mask(typ, fld))) | ((__mlx5_mask(typ, fld)) \
88 		     << __mlx5_dw_bit_off(typ, fld))); \
91 #define MLX5_GET(typ, p, fld) ((be32_to_cpu(*((__be32 *)(p) +\  argument
92 __mlx5_dw_off(typ, fld))) >> __mlx5_dw_bit_off(typ, fld)) & \
93 __mlx5_mask(typ, fld))
95 #define MLX5_GET_PR(typ, p, fld) ({ \  argument
96 	u32 ___t = MLX5_GET(typ, p, fld); \
101 #define __MLX5_SET64(typ, p, fld, v) do { \  argument
102 	BUILD_BUG_ON(__mlx5_bit_sz(typ, fld) != 64); \
103 	*((__be64 *)(p) + __mlx5_64_off(typ, fld)) = cpu_to_be64(v); \
106 #define MLX5_SET64(typ, p, fld, v) do { \  argument
107 	BUILD_BUG_ON(__mlx5_bit_off(typ, fld) % 64); \
108 	__MLX5_SET64(typ, p, fld, v); \
111 #define MLX5_ARRAY_SET64(typ, p, fld, idx, v) do { \  argument
112 	BUILD_BUG_ON(__mlx5_bit_off(typ, fld) % 64); \
113 	__MLX5_SET64(typ, p, fld[idx], v); \
116 #define MLX5_GET64(typ, p, fld) be64_to_cpu(*((__be64 *)(p) + __mlx5_64_off(typ, fld)))  argument
118 #define MLX5_GET16(typ, p, fld) ((be16_to_cpu(*((__be16 *)(p) +\  argument
119 __mlx5_16_off(typ, fld))) >> __mlx5_16_bit_off(typ, fld)) & \
120 __mlx5_mask16(typ, fld))
122 #define MLX5_SET16(typ, p, fld, v) do { \  argument
124 	BUILD_BUG_ON(__mlx5_st_sz_bits(typ) % 16);             \
125 	*((__be16 *)(p) + __mlx5_16_off(typ, fld)) = \
126 	cpu_to_be16((be16_to_cpu(*((__be16 *)(p) + __mlx5_16_off(typ, fld))) & \
127 		     (~__mlx5_16_mask(typ, fld))) | (((_v) & __mlx5_mask16(typ, fld)) \
128 		     << __mlx5_16_bit_off(typ, fld))); \
131 #define MLX5_GET64_BE(typ, p, fld) (*((__be64 *)(p) +\  argument
132 	__mlx5_64_off(typ, fld)))
134 #define MLX5_GET_BE(type_t, typ, p, fld) ({				  \  argument
138 			tmp = (__force type_t)MLX5_GET(typ, p, fld);	  \
141 			tmp = (__force type_t)cpu_to_be16(MLX5_GET(typ, p, fld)); \
144 			tmp = (__force type_t)cpu_to_be32(MLX5_GET(typ, p, fld)); \
147 			tmp = (__force type_t)MLX5_GET64_BE(typ, p, fld); \
161 #define MLX5_VSC_SET(typ, p, fld, v) do { \  argument
162 	BUILD_BUG_ON(__mlx5_st_sz_bits(typ) % 32);	       \
163 	BUILD_BUG_ON(__mlx5_bit_sz(typ, fld) > 32); \
164 	*((__le32 *)(p) + __mlx5_dw_off(typ, fld)) = \
165 	cpu_to_le32((le32_to_cpu(*((__le32 *)(p) + __mlx5_dw_off(typ, fld))) & \
166 		     (~__mlx5_dw_mask(typ, fld))) | (((v) & __mlx5_mask(typ, fld)) \
167 		     << __mlx5_dw_bit_off(typ, fld))); \
170 #define MLX5_VSC_GET(typ, p, fld) ((le32_to_cpu(*((__le32 *)(p) +\  argument
171 __mlx5_dw_off(typ, fld))) >> __mlx5_dw_bit_off(typ, fld)) & \
172 __mlx5_mask(typ, fld))
174 #define MLX5_VSC_GET_PR(typ, p, fld) ({ \  argument
175 	u32 ___t = MLX5_VSC_GET(typ, p, fld); \