Lines Matching refs:write_reg
39 phy->ops.write_reg = igc_null_write_reg; in igc_init_phy_ops_generic()
444 ret_val = phy->ops.write_reg(hw, PHY_AUTONEG_ADV, mii_autoneg_adv_reg); in igc_phy_setup_autoneg()
451 ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL, in igc_phy_setup_autoneg()
456 ret_val = phy->ops.write_reg(hw, in igc_phy_setup_autoneg()
509 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl); in igc_copper_link_autoneg()
675 ret_val = phy->ops.write_reg(hw, IGP02IGC_PHY_POWER_MGMT, in igc_set_d3_lplu_state_generic()
692 ret_val = phy->ops.write_reg(hw, in igc_set_d3_lplu_state_generic()
705 ret_val = phy->ops.write_reg(hw, in igc_set_d3_lplu_state_generic()
715 ret_val = phy->ops.write_reg(hw, IGP02IGC_PHY_POWER_MGMT, in igc_set_d3_lplu_state_generic()
727 ret_val = phy->ops.write_reg(hw, IGP01IGC_PHY_PORT_CONFIG, in igc_set_d3_lplu_state_generic()
917 hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg); in igc_power_up_phy_copper()
936 hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg); in igc_power_down_phy_copper()
1022 ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAC, dev_addr); in __igc_access_xmdio_reg()
1026 ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAAD, address); in __igc_access_xmdio_reg()
1030 ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAC, IGC_MMDAC_FUNC_DATA | in __igc_access_xmdio_reg()
1038 ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAAD, *data); in __igc_access_xmdio_reg()
1043 ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAC, 0); in __igc_access_xmdio_reg()