Lines Matching refs:BitSize

2032 static unsigned getTestUnderMaskCond(unsigned BitSize, unsigned CCMask,  in getTestUnderMaskCond()  argument
2170 unsigned BitSize = NewC.Op0.getValueSizeInBits(); in adjustForTestUnderMask() local
2177 (NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask, in adjustForTestUnderMask()
2188 (NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask, in adjustForTestUnderMask()
2195 NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask, MaskVal, CmpVal, in adjustForTestUnderMask()
3360 int64_t BitSize = (int64_t)1 << Log2_32_Ceil(NumSignificantBits); in lowerCTPOP() local
3361 BitSize = std::min(BitSize, OrigBitSize); in lowerCTPOP()
3370 for (int64_t I = BitSize / 2; I >= 8; I = I / 2) { in lowerCTPOP()
3372 if (BitSize != OrigBitSize) in lowerCTPOP()
3374 DAG.getConstant(((uint64_t)1 << BitSize) - 1, DL, VT)); in lowerCTPOP()
3379 if (BitSize > 8) in lowerCTPOP()
3381 DAG.getConstant(BitSize - 8, DL, VT)); in lowerCTPOP()
3444 int64_t BitSize = NarrowVT.getSizeInBits(); in lowerATOMIC_LOAD_OP() local
3481 DAG.getConstant(32 - BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP()
3485 DAG.getConstant(uint32_t(-1) >> BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP()
3490 DAG.getConstant(BitSize, DL, WideVT) }; in lowerATOMIC_LOAD_OP()
3497 DAG.getConstant(BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP()
3572 int64_t BitSize = NarrowVT.getSizeInBits(); in lowerATOMIC_CMP_SWAP() local
3593 NegBitShift, DAG.getConstant(BitSize, DL, WideVT) }; in lowerATOMIC_CMP_SWAP()
6446 unsigned BitSize, bool Invert) const { in emitAtomicLoadBinary() argument
6451 bool IsSubWord = (BitSize < 32); in emitAtomicLoadBinary()
6463 BitSize = MI.getOperand(6).getImm(); in emitAtomicLoadBinary()
6466 const TargetRegisterClass *RC = (BitSize <= 32 ? in emitAtomicLoadBinary()
6469 unsigned LOpcode = BitSize <= 32 ? SystemZ::L : SystemZ::LG; in emitAtomicLoadBinary()
6470 unsigned CSOpcode = BitSize <= 32 ? SystemZ::CS : SystemZ::CSG; in emitAtomicLoadBinary()
6517 if (BitSize <= 32) in emitAtomicLoadBinary()
6520 .addReg(Tmp).addImm(-1U << (32 - BitSize)); in emitAtomicLoadBinary()
6539 .addImm(32).addImm(31 + BitSize).addImm(32 - BitSize); in emitAtomicLoadBinary()
6565 unsigned KeepOldMask, unsigned BitSize) const { in emitAtomicLoadMinMax()
6570 bool IsSubWord = (BitSize < 32); in emitAtomicLoadMinMax()
6581 BitSize = MI.getOperand(6).getImm(); in emitAtomicLoadMinMax()
6584 const TargetRegisterClass *RC = (BitSize <= 32 ? in emitAtomicLoadMinMax()
6587 unsigned LOpcode = BitSize <= 32 ? SystemZ::L : SystemZ::LG; in emitAtomicLoadMinMax()
6588 unsigned CSOpcode = BitSize <= 32 ? SystemZ::CS : SystemZ::CSG; in emitAtomicLoadMinMax()
6644 .addImm(32).addImm(31 + BitSize).addImm(0); in emitAtomicLoadMinMax()
6694 int64_t BitSize = MI.getOperand(7).getImm(); in emitAtomicCmpSwapW() local
6756 .addReg(OldVal).addReg(BitShift).addImm(BitSize); in emitAtomicCmpSwapW()
6758 .addReg(CmpVal).addReg(Dest).addImm(32).addImm(63 - BitSize).addImm(0); in emitAtomicCmpSwapW()
6778 .addReg(SwapVal).addReg(Dest).addImm(32).addImm(63 - BitSize).addImm(0); in emitAtomicCmpSwapW()
6780 .addReg(RetrySwapVal).addReg(NegBitShift).addImm(-BitSize); in emitAtomicCmpSwapW()