Lines Matching refs:BitShift
3465 SDValue BitShift = DAG.getNode(ISD::SHL, DL, PtrVT, Addr, in lowerATOMIC_LOAD_OP() local
3467 BitShift = DAG.getNode(ISD::TRUNCATE, DL, WideVT, BitShift); in lowerATOMIC_LOAD_OP()
3472 DAG.getConstant(0, DL, WideVT), BitShift); in lowerATOMIC_LOAD_OP()
3489 SDValue Ops[] = { ChainIn, AlignedAddr, Src2, BitShift, NegBitShift, in lowerATOMIC_LOAD_OP()
3496 SDValue ResultShift = DAG.getNode(ISD::ADD, DL, WideVT, BitShift, in lowerATOMIC_LOAD_OP()
3581 SDValue BitShift = DAG.getNode(ISD::SHL, DL, PtrVT, Addr, in lowerATOMIC_CMP_SWAP() local
3583 BitShift = DAG.getNode(ISD::TRUNCATE, DL, WideVT, BitShift); in lowerATOMIC_CMP_SWAP()
3588 DAG.getConstant(0, DL, WideVT), BitShift); in lowerATOMIC_CMP_SWAP()
3592 SDValue Ops[] = { ChainIn, AlignedAddr, CmpVal, SwapVal, BitShift, in lowerATOMIC_CMP_SWAP()
6459 unsigned BitShift = (IsSubWord ? MI.getOperand(4).getReg() : 0); in emitAtomicLoadBinary() local
6512 .addReg(OldVal).addReg(BitShift).addImm(0); in emitAtomicLoadBinary()
6577 unsigned BitShift = (IsSubWord ? MI.getOperand(4).getReg() : 0); in emitAtomicLoadMinMax() local
6629 .addReg(OldVal).addReg(BitShift).addImm(0); in emitAtomicLoadMinMax()
6692 unsigned BitShift = MI.getOperand(5).getReg(); in emitAtomicCmpSwapW() local
6756 .addReg(OldVal).addReg(BitShift).addImm(BitSize); in emitAtomicCmpSwapW()