Lines Matching refs:getRegForValue
318 unsigned LHSReg = getRegForValue(LHS); in emitLogicalOp()
326 RHSReg = getRegForValue(RHS); in emitLogicalOp()
543 Addr.setReg(getRegForValue(Obj)); in computeAddress()
590 Addr.setReg(getRegForValue(V)); in computeCallAddress()
929 SrcReg = getRegForValue(Op0); in selectStore()
971 unsigned CondReg = getRegForValue(BI->getCondition()); in selectBranch()
1008 getRegForValue(Src); // this must be a 32bit floating point register class in selectFPExt()
1048 unsigned Src1Reg = getRegForValue(SI->getTrueValue()); in selectSelect()
1049 unsigned Src2Reg = getRegForValue(SI->getFalseValue()); in selectSelect()
1050 unsigned CondReg = getRegForValue(Cond); in selectSelect()
1086 unsigned SrcReg = getRegForValue(Src); in selectFPTrunc()
1122 unsigned SrcReg = getRegForValue(Src); in selectFPToInt()
1197 unsigned ArgReg = getRegForValue(ArgVal); in processCallArgs()
1595 unsigned SrcReg = getRegForValue(II->getOperand(0)); in fastLowerIntrinsicCall()
1721 unsigned Reg = getRegForValue(RV); in selectRet()
1789 unsigned SrcReg = getRegForValue(Op); in selectTrunc()
1805 unsigned SrcReg = getRegForValue(Src); in selectIntExt()
1936 unsigned Src0Reg = getRegForValue(I->getOperand(0)); in selectDivRem()
1937 unsigned Src1Reg = getRegForValue(I->getOperand(1)); in selectDivRem()
1969 unsigned Op0Reg = getRegForValue(Op0); in selectShift()
2009 unsigned Op1Reg = getRegForValue(I->getOperand(1)); in selectShift()
2092 unsigned VReg = getRegForValue(V); in getRegEnsuringSimpleIntegerWidening()