Lines Matching refs:createResultReg
330 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLogicalOp()
346 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in fastMaterializeAlloca()
367 unsigned ResultReg = createResultReg(RC); in materialize32BitInt()
381 unsigned TmpReg = createResultReg(RC); in materialize32BitInt()
396 unsigned DestReg = createResultReg(RC); in materializeFP()
402 unsigned DestReg = createResultReg(RC); in materializeFP()
417 unsigned DestReg = createResultReg(RC); in materializeGV()
428 unsigned TempReg = createResultReg(RC); in materializeGV()
439 unsigned DestReg = createResultReg(RC); in materializeExternalCallSym()
654 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
660 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
672 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
678 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
690 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
696 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
742 unsigned RegWithZero = createResultReg(&Mips::GPR32RegClass); in emitCmp()
743 unsigned RegWithOne = createResultReg(&Mips::GPR32RegClass); in emitCmp()
766 ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLoad()
770 ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLoad()
774 ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLoad()
780 ResultReg = createResultReg(&Mips::FGR32RegClass); in emitLoad()
786 ResultReg = createResultReg(&Mips::AFGR64RegClass); in emitLoad()
963 ZExtCondReg = createResultReg(&Mips::GPR32RegClass); in selectBranch()
989 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectCmp()
1013 unsigned DestReg = createResultReg(&Mips::AFGR64RegClass); in selectFPExt()
1055 unsigned ZExtCondReg = createResultReg(&Mips::GPR32RegClass); in selectSelect()
1062 unsigned ResultReg = createResultReg(RC); in selectSelect()
1063 unsigned TempReg = createResultReg(RC); in selectSelect()
1090 unsigned DestReg = createResultReg(&Mips::FGR32RegClass); in selectFPTrunc()
1128 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in selectFPToInt()
1129 unsigned TempReg = createResultReg(&Mips::FGR32RegClass); in selectFPToInt()
1295 unsigned ResultReg = createResultReg(TLI.getRegClassFor(CopyVT)); in finishCall()
1467 unsigned ResultReg = createResultReg(Allocation[ArgNo].RC); in fastLowerArguments()
1598 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall()
1609 TempReg[i] = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall()
1622 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall()
1630 TempReg[i] = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall()
1819 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectIntExt()
1840 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitIntSExt32r1()
1908 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in emitIntExt()
1944 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectDivRem()
1963 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectShift()
1975 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in selectShift()
2101 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in getRegEnsuringSimpleIntegerWidening()
2113 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in simplifyAddress()
2131 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rr()