Lines Matching refs:MachineReg
99 unsigned MachineReg, unsigned MaxSize) { in addMachineReg() argument
100 if (!TRI.isPhysicalRegister(MachineReg)) { in addMachineReg()
101 if (isFrameRegister(TRI, MachineReg)) { in addMachineReg()
108 int Reg = TRI.getDwarfRegNum(MachineReg, false); in addMachineReg()
118 for (MCSuperRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) { in addMachineReg()
121 unsigned Idx = TRI.getSubRegIndex(*SR, MachineReg); in addMachineReg()
135 const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(MachineReg); in addMachineReg()
143 for (MCSubRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) { in addMachineReg()
144 unsigned Idx = TRI.getSubRegIndex(MachineReg, *SR); in addMachineReg()
221 unsigned MachineReg, in addMachineRegExpression() argument
224 if (!addMachineReg(TRI, MachineReg, Fragment ? Fragment->SizeInBits : ~1U)) { in addMachineRegExpression()
267 bool FBReg = isFrameRegister(TRI, MachineReg); in addMachineRegExpression()