Lines Matching refs:E1000_WRITE_REG
522 E1000_WRITE_REG(hw, E1000_EIMS, 1 << IGB_MSIX_OTHER_INTR_VEC); in igb_intr_enable()
525 E1000_WRITE_REG(hw, E1000_IMS, intr->mask); in igb_intr_enable()
539 E1000_WRITE_REG(hw, E1000_EIMC, 1 << IGB_MSIX_OTHER_INTR_VEC); in igb_intr_disable()
542 E1000_WRITE_REG(hw, E1000_IMC, ~0); in igb_intr_disable()
553 E1000_WRITE_REG(hw, E1000_EIAM, 1 << E1000_VTIVAR_MISC_MAILBOX); in igbvf_intr_enable()
554 E1000_WRITE_REG(hw, E1000_EIAC, 1 << E1000_VTIVAR_MISC_MAILBOX); in igbvf_intr_enable()
555 E1000_WRITE_REG(hw, E1000_EIMS, 1 << E1000_VTIVAR_MISC_MAILBOX); in igbvf_intr_enable()
568 E1000_WRITE_REG(hw, E1000_VTIVAR_MISC, tmp); in igbvf_set_ivar_map()
592 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext); in igb_pf_reset_hw()
847 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext); in eth_igb_dev_init()
1065 E1000_WRITE_REG(hw, E1000_RCTL, rctl); in igb_vmdq_vlan_hw_filter_enable()
1186 E1000_WRITE_REG(hw, E1000_TCTL, tctl); in eth_igb_rxtx_control()
1187 E1000_WRITE_REG(hw, E1000_RCTL, rctl); in eth_igb_rxtx_control()
1224 E1000_WRITE_REG(hw, E1000_PBA, pba); in eth_igb_start()
1237 E1000_WRITE_REG(hw, E1000_VET, in eth_igb_start()
1243 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext); in eth_igb_start()
1307 E1000_WRITE_REG(hw, E1000_EITR(0), 0xFFFF); in eth_igb_start()
1435 E1000_WRITE_REG(hw, E1000_WUC, 0); in eth_igb_stop()
1444 E1000_WRITE_REG(hw, E1000_82580_PHY_POWER_MGMT, phpm_reg); in eth_igb_stop()
1525 E1000_WRITE_REG(hw, E1000_82580_PHY_POWER_MGMT, phpm_reg); in eth_igb_close()
1659 E1000_WRITE_REG(hw, E1000_WUC, 0); in igb_hardware_init()
1665 E1000_WRITE_REG(hw, E1000_VET, in igb_hardware_init()
2428 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); in igb_hw_control_acquire()
2443 E1000_WRITE_REG(hw, E1000_CTRL_EXT, in igb_hw_control_release()
2466 E1000_WRITE_REG(hw, E1000_MANC2H, manc2h); in igb_init_manageability()
2467 E1000_WRITE_REG(hw, E1000_MANC, manc); in igb_init_manageability()
2480 E1000_WRITE_REG(hw, E1000_MANC, manc); in igb_release_manageability()
2493 E1000_WRITE_REG(hw, E1000_RCTL, rctl); in eth_igb_promiscuous_enable()
2511 E1000_WRITE_REG(hw, E1000_RCTL, rctl); in eth_igb_promiscuous_disable()
2525 E1000_WRITE_REG(hw, E1000_RCTL, rctl); in eth_igb_allmulticast_enable()
2541 E1000_WRITE_REG(hw, E1000_RCTL, rctl); in eth_igb_allmulticast_disable()
2590 E1000_WRITE_REG(hw, E1000_VET, reg); in eth_igb_vlan_tpid_set()
2612 E1000_WRITE_REG(hw, E1000_RCTL, reg); in igb_vlan_hw_filter_disable()
2629 E1000_WRITE_REG(hw, E1000_RCTL, reg); in igb_vlan_hw_filter_enable()
2646 E1000_WRITE_REG(hw, E1000_CTRL, reg); in igb_vlan_hw_strip_disable()
2659 E1000_WRITE_REG(hw, E1000_CTRL, reg); in igb_vlan_hw_strip_enable()
2672 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg); in igb_vlan_hw_extend_disable()
2675 E1000_WRITE_REG(hw, E1000_RLPML, dev->data->mtu + E1000_ETH_OVERHEAD); in igb_vlan_hw_extend_disable()
2688 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg); in igb_vlan_hw_extend_enable()
2691 E1000_WRITE_REG(hw, E1000_RLPML, in igb_vlan_hw_extend_enable()
2780 E1000_WRITE_REG(hw, E1000_EIMS, regval | mask); in eth_igb_rxq_interrupt_setup()
3084 E1000_WRITE_REG(hw, E1000_RCTL, rctl); in eth_igb_flow_ctrl_set()
3116 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in eth_igb_flow_ctrl_set()
3138 E1000_WRITE_REG(hw, E1000_RAH(index), rah); in eth_igb_rar_set()
3171 E1000_WRITE_REG(hw, E1000_EIMC, 0xFFFF); in igbvf_intr_disable()
3198 E1000_WRITE_REG(hw, E1000_TXDCTL(i), E1000_TXDCTL_SWFLSH); in igbvf_stop_adapter()
3204 E1000_WRITE_REG(hw, E1000_RXDCTL(i), reg_val); in igbvf_stop_adapter()
3592 E1000_WRITE_REG(hw, E1000_RETA(i >> 2), reta); in eth_igb_rss_reta_update()
3662 E1000_WRITE_REG(hw, E1000_RFCTL, rfctl); in eth_igb_syn_filter_set()
3670 E1000_WRITE_REG(hw, E1000_SYNQF(0), synqf); in eth_igb_syn_filter_set()
3780 E1000_WRITE_REG(hw, E1000_IMIR(i), imir); in igb_inject_2uple_filter()
3781 E1000_WRITE_REG(hw, E1000_TTQF(i), ttqf); in igb_inject_2uple_filter()
3782 E1000_WRITE_REG(hw, E1000_IMIREXT(i), imir_ext); in igb_inject_2uple_filter()
3860 E1000_WRITE_REG(hw, E1000_TTQF(filter->index), E1000_TTQF_DISABLE_MASK); in igb_delete_2tuple_filter()
3861 E1000_WRITE_REG(hw, E1000_IMIR(filter->index), 0); in igb_delete_2tuple_filter()
3862 E1000_WRITE_REG(hw, E1000_IMIREXT(filter->index), 0); in igb_delete_2tuple_filter()
3921 E1000_WRITE_REG(hw, E1000_WUFC, wufc | E1000_WUFC_FLEX_HQ | in igb_inject_flex_filter()
3927 E1000_WRITE_REG(hw, reg_off + E1000_FHFT_QUEUEING_OFFSET, in igb_inject_flex_filter()
3931 E1000_WRITE_REG(hw, reg_off, in igb_inject_flex_filter()
3934 E1000_WRITE_REG(hw, reg_off, in igb_inject_flex_filter()
3937 E1000_WRITE_REG(hw, reg_off, in igb_inject_flex_filter()
3981 E1000_WRITE_REG(hw, reg_off + i * sizeof(uint32_t), 0); in igb_remove_flex_filter()
3983 E1000_WRITE_REG(hw, E1000_WUFC, wufc & in igb_remove_flex_filter()
4189 E1000_WRITE_REG(hw, E1000_FTQF(i), ftqf); in igb_inject_5tuple_filter_82576()
4190 E1000_WRITE_REG(hw, E1000_DAQF(i), filter->filter_info.dst_ip); in igb_inject_5tuple_filter_82576()
4191 E1000_WRITE_REG(hw, E1000_SAQF(i), filter->filter_info.src_ip); in igb_inject_5tuple_filter_82576()
4194 E1000_WRITE_REG(hw, E1000_SPQF(i), spqf); in igb_inject_5tuple_filter_82576()
4220 E1000_WRITE_REG(hw, E1000_IMIR(i), imir); in igb_inject_5tuple_filter_82576()
4221 E1000_WRITE_REG(hw, E1000_IMIREXT(i), imir_ext); in igb_inject_5tuple_filter_82576()
4301 E1000_WRITE_REG(hw, E1000_FTQF(filter->index), in igb_delete_5tuple_filter_82576()
4303 E1000_WRITE_REG(hw, E1000_DAQF(filter->index), 0); in igb_delete_5tuple_filter_82576()
4304 E1000_WRITE_REG(hw, E1000_SAQF(filter->index), 0); in igb_delete_5tuple_filter_82576()
4305 E1000_WRITE_REG(hw, E1000_SPQF(filter->index), 0); in igb_delete_5tuple_filter_82576()
4306 E1000_WRITE_REG(hw, E1000_IMIR(filter->index), 0); in igb_delete_5tuple_filter_82576()
4307 E1000_WRITE_REG(hw, E1000_IMIREXT(filter->index), 0); in igb_delete_5tuple_filter_82576()
4381 E1000_WRITE_REG(hw, E1000_RCTL, rctl); in eth_igb_mtu_set()
4383 E1000_WRITE_REG(hw, E1000_RLPML, frame_size); in eth_igb_mtu_set()
4537 E1000_WRITE_REG(hw, E1000_ETQF(ret), etqf); in igb_add_del_ethertype_filter()
4691 E1000_WRITE_REG(hw, E1000_TIMINCA, incval); in igb_start_timecounters()
4696 E1000_WRITE_REG(hw, E1000_TIMINCA, in igb_start_timecounters()
4770 E1000_WRITE_REG(hw, E1000_TIMINCA, 0x0); in igb_timesync_enable()
4778 E1000_WRITE_REG(hw, E1000_SYSTIMR, 0x0); in igb_timesync_enable()
4781 E1000_WRITE_REG(hw, E1000_SYSTIML, 0x0); in igb_timesync_enable()
4782 E1000_WRITE_REG(hw, E1000_SYSTIMH, 0x0); in igb_timesync_enable()
4792 E1000_WRITE_REG(hw, E1000_TSAUXC, tsauxc); in igb_timesync_enable()
4797 E1000_WRITE_REG(hw, E1000_ETQF(E1000_ETQF_FILTER_1588), in igb_timesync_enable()
4805 E1000_WRITE_REG(hw, E1000_TSYNCRXCTL, tsync_ctl); in igb_timesync_enable()
4810 E1000_WRITE_REG(hw, E1000_TSYNCTXCTL, tsync_ctl); in igb_timesync_enable()
4824 E1000_WRITE_REG(hw, E1000_TSYNCTXCTL, tsync_ctl); in igb_timesync_disable()
4829 E1000_WRITE_REG(hw, E1000_TSYNCRXCTL, tsync_ctl); in igb_timesync_disable()
4832 E1000_WRITE_REG(hw, E1000_ETQF(E1000_ETQF_FILTER_1588), 0); in igb_timesync_disable()
4835 E1000_WRITE_REG(hw, E1000_TIMINCA, 0); in igb_timesync_disable()
5116 E1000_WRITE_REG(hw, E1000_EIMC, mask); in eth_igb_rx_queue_intr_disable()
5138 E1000_WRITE_REG(hw, E1000_EIMS, regval | mask); in eth_igb_rx_queue_intr_enable()
5172 E1000_WRITE_REG(hw, E1000_MSIXBM(msix_vector), tmp); in eth_igb_assign_msix_vector()
5229 E1000_WRITE_REG(hw, E1000_CTRL_EXT, tmpval); in eth_igb_configure_msix_intr()
5234 E1000_WRITE_REG(hw, E1000_EIAC, regval | E1000_EIMS_OTHER); in eth_igb_configure_msix_intr()
5236 E1000_WRITE_REG(hw, E1000_EIMS, regval | E1000_EIMS_OTHER); in eth_igb_configure_msix_intr()
5244 E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE | in eth_igb_configure_msix_intr()
5257 E1000_WRITE_REG(hw, E1000_EIAC, regval | intr_mask); in eth_igb_configure_msix_intr()
5261 E1000_WRITE_REG(hw, E1000_EIMS, regval | intr_mask); in eth_igb_configure_msix_intr()
5263 E1000_WRITE_REG(hw, E1000_IVAR_MISC, tmpval); in eth_igb_configure_msix_intr()
5279 E1000_WRITE_REG(hw, E1000_EIAM, regval | intr_mask); in eth_igb_configure_msix_intr()
5321 E1000_WRITE_REG(hw, E1000_SYNQF(0), synqf); in igb_syn_filter_restore()
5337 E1000_WRITE_REG(hw, E1000_ETQF(i), in igb_ethertype_filter_restore()