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Revision tags: v3.14.0 |
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021d41cf |
| 28-Nov-2024 |
GuEe-GUI <[email protected]> |
Port to RT-Thread Smart DM PCI
Signed-off-by: GuEe-GUI <[email protected]>
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a18c5481 |
| 18-Jan-2025 |
Pali Rohár <[email protected]> |
pcilib.man: Update information about win32-kldbg
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Revision tags: v3.13.0, v3.12.0, v3.11.1, v3.11.0 |
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65b81b9d |
| 18-Feb-2024 |
Pali Rohár <[email protected]> |
libpci: Update manpage documentation for devmem.path
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71b65e73 |
| 18-Feb-2024 |
Martin Mares <[email protected]> |
Manual: Document tilde expansion in net.cache_name
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5b52ae79 |
| 22-Jan-2024 |
Agg242 <[email protected]> |
New back-end for AmigaOS on PowerPC
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Revision tags: v3.10.0 |
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2ba0f6f4 |
| 29-Jan-2023 |
Pali Rohár <[email protected]> |
libpci: Add PCIe ECAM access method
This is a new direct hardware access method via PCIe ECAM (Enhanced Configuration Access Mechanism). It is available on all PCIe-compliant hardware. Requires root
libpci: Add PCIe ECAM access method
This is a new direct hardware access method via PCIe ECAM (Enhanced Configuration Access Mechanism). It is available on all PCIe-compliant hardware. Requires root privileges and access to physical memory.
ECAM mapping can be specified manually via a new ecam.addrs parameter or can be read from ACPI MCFG table. ACPI MCFG table can be located in the system or read from x86 BIOS memory.
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ea404c2a |
| 04-Mar-2023 |
Martin Mares <[email protected]> |
win32-cfgmgr32: Clean up initialization
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96240635 |
| 04-Mar-2023 |
Martin Mares <[email protected]> |
win32-cfgmgr32: Improve wording in manual page
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848123eb |
| 30-Dec-2022 |
Pali Rohár <[email protected]> |
libpci: win32-cfgmgr32: Add support for accessing config space via other backend
Extend win32-cfgmgr32 backend and add a new option win32.cfgmethod for specifying other backend for accessing PCI con
libpci: win32-cfgmgr32: Add support for accessing config space via other backend
Extend win32-cfgmgr32 backend and add a new option win32.cfgmethod for specifying other backend for accessing PCI config space. There are more config space access methods available on Windows and each is working only sometimes (either requires special privileges or special setup).
So by default try to choose the first working one via order defined in pci probe_sequence[] array. If none is available then emulate PCI config space like before this change.
Function pci_init_v35() is extended and renamed to pci_init_internal() to optionally do not throw errors and allow to specify one access method which will be skipped in AUTO mode. This is used to prevent choosing win32-cfgmgr32 as config space access method for win32-cfgmgr32.
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Revision tags: v3.9.0, v3.8.0 |
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e2d9340b |
| 02-Jan-2022 |
Pali Rohár <[email protected]> |
libpci: mmio-ports: Add Extended PCIe Intel Type 1 access method
Extended method allows to access all PCIe registers, including extended registers starting at 0x100 offset. This method uses 4 reserv
libpci: mmio-ports: Add Extended PCIe Intel Type 1 access method
Extended method allows to access all PCIe registers, including extended registers starting at 0x100 offset. This method uses 4 reserved buts above bus bits for PCIe registers. On ARM platforms it is very common for PCIe controllers. Like standard method, it needs to be properly configured.
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388dc6c2 |
| 07-Mar-2022 |
Pali Rohár <[email protected]> |
pcilib.man: Include information about win32-kldbg
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0a7350fb |
| 02-Jan-2022 |
Pali Rohár <[email protected]> |
libpci: Add Intel Type 1 implementation for memory mapped systems
Lot of non-x86 platforms also support Intel Type 1 mechanism. x86 IO ports CF8 and CFC are on these platforms mapped into standard m
libpci: Add Intel Type 1 implementation for memory mapped systems
Lot of non-x86 platforms also support Intel Type 1 mechanism. x86 IO ports CF8 and CFC are on these platforms mapped into standard memory space. Address mapping itself is platform or board specific and there is no default value.
Lot of ARM boards with multiple PCIe controllers are multi-domain and each PCI domain has its own CF8/CFC (address/data) registers mapped into memory space.
Add new mmio-conf1 backend which access CF8/CFC ports via MMIO and define new config option mmio-conf1.addrs which specify list of address/data register pairs in memory space for each PCI domain. Format of this option is: 0xaddr1/0xdata1,0xaddr2/0xdata2,...
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963d7cb7 |
| 07-Mar-2022 |
Pali Rohár <[email protected]> |
pcilib.man: Include information about win32-sysdbg
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765da485 |
| 04-Jan-2022 |
Pali Rohár <[email protected]> |
pcilib.man: Include information about win32-cfgmgr32
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Revision tags: v3.7.0, v3.6.4, v3.6.3 |
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ef5b622f |
| 21-Jan-2020 |
Martin Mares <[email protected]> |
Added a man page for pci.ids
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Revision tags: v3.6.2, v3.6.1, v3.6.0, v3.5.6, v3.5.5, v3.5.4, v3.5.3, v3.5.2, v3.5.1, v3.5.0, v3.4.1, v3.4.0, v3.3.1, v3.3.0 |
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d6d6a58d |
| 02-Nov-2014 |
Martin Mares <[email protected]> |
Clean up man pages
We do not call .IX as it's not defined in mandoc. Ellipsis at the end of line is protected by \&.
Inspired by Debian patches for the following bugs: https://bugs.debian.org/cgi-b
Clean up man pages
We do not call .IX as it's not defined in mandoc. Ellipsis at the end of line is protected by \&.
Inspired by Debian patches for the following bugs: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=674708 https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=675087
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ac357d3b |
| 01-Nov-2014 |
Martin Mares <[email protected]> |
Rewritten support for UDEV's HWDB
HWDB is now handled in a way very similar to the DNS resolver.
The interface lives in a separate source file (lib/names-hwdb.c), results of lookups are cached. Use
Rewritten support for UDEV's HWDB
HWDB is now handled in a way very similar to the DNS resolver.
The interface lives in a separate source file (lib/names-hwdb.c), results of lookups are cached. Use of HWDB can be disabled either by passing PCI_LOOKUP_NO_HWDB or by setting the hwdb.disabled configuration parameter.
Also, there should be no more leaks of libudev's structures.
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d4c2ab05 |
| 01-Nov-2014 |
Martin Mares <[email protected]> |
Manual: Mention Darwin in the list of access methods
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Revision tags: v3.2.1, v3.2.0, v3.1.10, v3.1.9, v3.1.8 |
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40e253d7 |
| 30-Nov-2010 |
François Revol <[email protected]> |
BeOS and Haiku ports
The BeOS port uses private syscalls exported by libroot.so to implement the intel access methods. The Haiku port uses ioctls to the /dev/misc/poke device driver (use originally
BeOS and Haiku ports
The BeOS port uses private syscalls exported by libroot.so to implement the intel access methods. The Haiku port uses ioctls to the /dev/misc/poke device driver (use originally for debugging with /bin/poke) to implement the intel access methods. BeOS has non-standard arch names, so we map them to i386 and powerpc in the configure. Updated README and pcilib.man accordingly.
Signed-off-by: François Revol <[email protected]>
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Revision tags: v3.1.7, v3.1.6, v3.1.5, v3.1.4, v3.1.3, v3.1.2, v3.1.1, v3.1.0, v3.1-alpha3 |
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e16e04e8 |
| 12-Dec-2008 |
Martin Mares <[email protected]> |
Man: Mention that the sysfs backend supports physical slots.
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Revision tags: v3.1-alpha2 |
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9bd5b1cf |
| 18-Nov-2008 |
Ben Hutchings <[email protected]> |
Add implementation of read_vpd() method for sysfs
Signed-off-by: Ben Hutchings <[email protected]>
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Revision tags: v3.1-alpha1, v3.0.3, v3.0.2, v3.0.1, v3.0.0 |
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f2bf13dc |
| 12-Feb-2008 |
Martin Mares <[email protected]> |
Improved man pages. Parts related to the library moved to pcilib(7).
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