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Revision tags: v3.14.0, v3.13.0, v3.12.0, v3.11.1, v3.11.0 |
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7d23054d |
| 27-Dec-2023 |
Nikita Proshkin <[email protected]> |
libpci: Add separate file for bit manipulation functions
Move several macros from lspci and add some more for operations with bit masks.
Reviewed-by: Sergei Miroshnichenko <[email protected]
libpci: Add separate file for bit manipulation functions
Move several macros from lspci and add some more for operations with bit masks.
Reviewed-by: Sergei Miroshnichenko <[email protected]> Signed-off-by: Nikita Proshkin <[email protected]>
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61829219 |
| 18-Jun-2023 |
Martin Mares <[email protected]> |
Update license comments and added SPDX license identifiers
Previously, the only information about the specific version of GPL was present in the README and individual source files mentioned only GPL
Update license comments and added SPDX license identifiers
Previously, the only information about the specific version of GPL was present in the README and individual source files mentioned only GPL alone.
Let us update all copyright comments to explicitly say "GPL v2+" and also include the machine readable SPDX license identifier.
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Revision tags: v3.10.0 |
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6662052f |
| 22-Apr-2023 |
Pali Rohár <[email protected]> |
ls-tree: Print PCI domains in ascending order
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5b0411aa |
| 17-Apr-2023 |
Pali Rohár <[email protected]> |
ls-tree: Rename struct bridge member next to prev
It refers to the previous value in linked-list, not to the next.
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Revision tags: v3.9.0, v3.8.0 |
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832b07a8 |
| 28-Dec-2021 |
Pali Rohár <[email protected]> |
lspci: Do not access config space when it is emulated
Emulated config space contains only few information so it could look like some valid config space. libpci compose emulated config space either f
lspci: Do not access config space when it is emulated
Emulated config space contains only few information so it could look like some valid config space. libpci compose emulated config space either from struct pci_dev or put some fake information (when struct pci_dev does not have them).
To prevent showing to user fake/bogus information about PCI devices, show only information which are directly stored in struct pci_dev when emulated config space is used.
Do it via setting lspci's header type to invalid value (byte)-1, so lspci code will handle device as unknown without trying to interpret values config space. This header type is set only in lspci, not in libpci, so other libpci applications would see valid config space.
lspci users are probably not interested in fake information provided by libpci just for purpose to export syntactically valid config space. Information stored in struct pci_dev are the correct one (or rather what OS things that is correct).
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fb570ee3 |
| 20-Dec-2021 |
Pali Rohár <[email protected]> |
lspci: Retrieve prog if, subsystem ids and revision id via libpci
Use pci_fill_info with CLASS_EXT and SUBSYS to fill this information.
lspci in some places reads class from what libpci provider fi
lspci: Retrieve prog if, subsystem ids and revision id via libpci
Use pci_fill_info with CLASS_EXT and SUBSYS to fill this information.
lspci in some places reads class from what libpci provider fills in dev->device_class and in some other places it reads directly from config space. In dev->device_class is stored class possible different class as in config space (e.g. if kernel is fixing class because device has bogus information stored in config space).
With this change is class always read from dev->device_class which reflects and respects lspci -b option (Bus-centric view). Same applies for subsystem ids and revision id (note that prog if is part of class).
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b1cff3a4 |
| 26-Dec-2021 |
Pali Rohár <[email protected]> |
lspci: Print buses of multibus PCI domain in ascending order
Currently PCI domains are printed in ascending order. Devices on each PCI bus are also printed in ascending order. PCI buses behind PCI-t
lspci: Print buses of multibus PCI domain in ascending order
Currently PCI domains are printed in ascending order. Devices on each PCI bus are also printed in ascending order. PCI buses behind PCI-to-PCI bridges are also printed in ascending order.
But buses of PCI domain are currently printed in descending order because function new_bus() puts newly created bus at the beginning of linked list.
In most cases PCI domain contains only one (top level) bus, so in most cases it is not visible this inconsistency.
Multibus PCI domains (where PCI domain contains more independent top level PCI buses) are available on ARM devices.
This change fixes print order of multibus PCI domains, so also top level PCI buses are printed in ascending order, like PCI buses behind PCI-to-PCI bridges.
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Revision tags: v3.7.0, v3.6.4, v3.6.3 |
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888ddf0e |
| 18-Sep-2018 |
Gera Kazakov <[email protected]> |
lspci: Allow -s with -t to show a subtree
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Revision tags: v3.6.2 |
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6b056c8e |
| 10-Aug-2018 |
Martin Mares <[email protected]> |
Generalized topology computation in ls-tree.c
The topology tree is now independent of the plain device list and it can be traversed in both top-to-bottom and bottom-to-top directions.
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Revision tags: v3.6.1, v3.6.0 |
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5c5ce192 |
| 29-Dec-2017 |
Rudolf Marek <[email protected]> |
pciutils: Add the support for a DOS/DJGPP environment
Here is bit a blast from the past. The flashrom still supports the DOS/DJGPP environment, which requires pciutils to be compiled with DJGPP. I o
pciutils: Add the support for a DOS/DJGPP environment
Here is bit a blast from the past. The flashrom still supports the DOS/DJGPP environment, which requires pciutils to be compiled with DJGPP. I originally developed this patch in 2010, and I respun it for latest pciutils.
* Add DJGPP as an OS target * Stop if endianess macros are not defined * Introduce new intel_io_lock/unclock function to synchronize I/O operations.
There is a small issue left that "lspci" and "lspci.exe" are created. The ".exe" variants are not installed and also not cleaned. No idea if you want to fix that or not.
Signed-off-by: Rudolf Marek <[email protected]>
Compiled with:
make ZLIB=no DNS=no HOST=i386-djgpp-djgpp CROSS_COMPILE=i586-pc-msdosdjgpp- \ PREFIX=/ DESTDIR=$PWD/../libpci-libgetopt \ STRIP="--strip-program=i586-pc-msdosdjgpp-strip -s" install install-lib
If you put to C:\share\pci.ids file, the lspci.exe will also display the human readable output.
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Revision tags: v3.5.6, v3.5.5 |
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a1492b88 |
| 21-Apr-2017 |
Bjorn Helgaas <[email protected]> |
lspci: Decode AER Root Error Command, Root Error Status, Error Source
Decode the AER Root Error Command, Root Error Status, and Error Source Identification registers.
Per PCIe r3.1, sec 7.10, these
lspci: Decode AER Root Error Command, Root Error Status, Error Source
Decode the AER Root Error Command, Root Error Status, and Error Source Identification registers.
Per PCIe r3.1, sec 7.10, these registers are only available for Root Ports and Root Complex Event Collectors, so we have to check the Device/Port Type from the PCIe capability.
The difference in the "lspci -vv" output looks like this (for a Root Port):
+ RootCmd: CERptEn- NFERptEn- FERptEn- + RootSta: CERcvd- MultCERcvd- UERcvd- MultUERcvd- + FirstFatal- NonFatalMsg- FatalMsg- IntMsg 0 + ErrorSrc: ERR_COR: 0000 ERR_FATAL/NONFATAL: 0000
Signed-off-by: Bjorn Helgaas <[email protected]>
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Revision tags: v3.5.4, v3.5.3, v3.5.2, v3.5.1, v3.5.0, v3.4.1, v3.4.0, v3.3.1 |
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7ff8a323 |
| 21-Jan-2015 |
Gerd Hoffmann <[email protected]> |
Add virtio vendor capability support
virtio uses vendor-specific capabilities to specify the location of the virtio register ranges. The specification can be found here:
http://docs.oasis-open.org
Add virtio vendor capability support
virtio uses vendor-specific capabilities to specify the location of the virtio register ranges. The specification can be found here:
http://docs.oasis-open.org/virtio/virtio/v1.0/cs01/virtio-v1.0-cs01.html#x1-690004
This patch adds support for decoding these capabilities to lspci.
Signed-off-by: Gerd Hoffmann <[email protected]>
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Revision tags: v3.3.0, v3.2.1 |
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21510591 |
| 20-Apr-2013 |
Matthew Wilcox <[email protected]> |
lspci: Display CardBus bridge capabilities
CardBus bridges can have capabilities, but the CAP_PTR register is at a different location. This one has Power Management:
CardBus bridge: O2 Micro, Inc.
lspci: Display CardBus bridge capabilities
CardBus bridges can have capabilities, but the CAP_PTR register is at a different location. This one has Power Management:
CardBus bridge: O2 Micro, Inc. OZ711SP1 Memory CardBus Controller (rev 01) + Capabilities: [a0] Power Management version 2
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Revision tags: v3.2.0 |
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17ec7e70 |
| 01-Apr-2013 |
Martin Mares <[email protected]> |
On newer Linux systems, use libkmod to look up kernel modules
With modutils built upon libkmod, modules.pcimap does not exist any longer.
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Revision tags: v3.1.10, v3.1.9, v3.1.8, v3.1.7, v3.1.6 |
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8f39f69e |
| 24-Jan-2010 |
Martin Mares <[email protected]> |
Updated (c) years.
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769ff0a8 |
| 23-Jan-2010 |
Martin Mares <[email protected]> |
Added helper macros BITS and TABLE
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Revision tags: v3.1.5, v3.1.4, v3.1.3, v3.1.2, v3.1.1, v3.1.0, v3.1-alpha3, v3.1-alpha2 |
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c7a34993 |
| 21-Nov-2008 |
Martin Mares <[email protected]> |
Split lspci to multiple source files.
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