Fix formatting of 64-bit integers

PCI_U64_FMT_X is needed.

lspci: add VirtIO SharedMemory capability support

This patch adds the support for VirtIO share memory capability [1].
A shared memory region is defined in a `struct virtio_pci_cap64`
where the highe

lspci: add VirtIO SharedMemory capability support

This patch adds the support for VirtIO share memory capability [1].
A shared memory region is defined in a `struct virtio_pci_cap64`
where the highest 32 bits of `offset` and `size` are appened to the
original `struct virtio_pci_cap`.

With this patch, a VirtIO PMEM device (ID 27) shows like the
following:

```
00:02.0 Class ffff: Device 1af4:105b (rev 01)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Region 0: Memory at 100001000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at 101000000 (64-bit, non-prefetchable) [size=16M]
Capabilities: [40] Vendor Specific Information: VirtIO: CommonCfg
BAR=0 offset=00000000 size=0000003c
Capabilities: [50] Vendor Specific Information: VirtIO: ISR
BAR=0 offset=0000003c size=00000001
Capabilities: [60] Vendor Specific Information: VirtIO: Notify
BAR=0 offset=00000040 size=00000002 multiplier=00000002
Capabilities: [78] MSI-X: Enable+ Count=2 Masked-
Vector table: BAR=0 offset=00000058
PBA: BAR=0 offset=00000078
Capabilities: [88] Vendor Specific Information: VirtIO: DeviceCfg
BAR=0 offset=00000044 size=00000010
Capabilities: [98] Vendor Specific Information: VirtIO: SharedMemory
BAR=2 offset=0000000000000000 size=0000000001000000 id=0
Kernel driver in use: virtio-pci
```

[1] Sec 4.1.4.7 https://docs.oasis-open.org/virtio/virtio/v1.2/csd01/virtio-v1.2-csd01.html#x1-1240004

Signed-off-by: Changyuan Lyu <[email protected]>

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lspci: Parse Intel Vendor specific capabilities

Intel Vendor specific capabilities are present on following devices:
* Intel Host Bridge / DRAM Controller
* Intel Integrated Graphics Controller
* In

lspci: Parse Intel Vendor specific capabilities

Intel Vendor specific capabilities are present on following devices:
* Intel Host Bridge / DRAM Controller
* Intel Integrated Graphics Controller
* Intel LPC Controller

Intel Host Bridge / DRAM Controller is on BDF address 00:00.0, so following
command should should parse and show Intel Vendor specific capabilities:

lspci -s 00:00.0 -vv

Currently only Intel Capabilities Version 1 is supported for now. This is
used since second generation of the Intel Core processors (Sandy Bridge).

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lspci: Use mangled vendor/device ID when examining vendor caps

Given that PCI VFs are expected to have a vendor and device ID of
0xffff, when examining vendor capabilities use the mangled vendor and

lspci: Use mangled vendor/device ID when examining vendor caps

Given that PCI VFs are expected to have a vendor and device ID of
0xffff, when examining vendor capabilities use the mangled vendor and
device IDs (typically copied from the PF) rather than those read from
the VF configuration space.

Signed-off-by: David Edmondson <[email protected]>

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Update license comments and added SPDX license identifiers

Previously, the only information about the specific version of GPL
was present in the README and individual source files mentioned only
GPL

Update license comments and added SPDX license identifiers

Previously, the only information about the specific version of GPL
was present in the README and individual source files mentioned only
GPL alone.

Let us update all copyright comments to explicitly say "GPL v2+"
and also include the machine readable SPDX license identifier.

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Improved listing of vendor-specific information

Add virtio vendor capability support

virtio uses vendor-specific capabilities to specify the location of
the virtio register ranges. The specification can be found here:

http://docs.oasis-open.org

Add virtio vendor capability support

virtio uses vendor-specific capabilities to specify the location of
the virtio register ranges. The specification can be found here:

http://docs.oasis-open.org/virtio/virtio/v1.0/cs01/virtio-v1.0-cs01.html#x1-690004

This patch adds support for decoding these capabilities to lspci.

Signed-off-by: Gerd Hoffmann <[email protected]>

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