[mlir] Remove mlir-rocm-runnerThis change combines for ROCm what was done for CUDA in D97463, D98203, D98360, and D98396.I did not try to compile SerializeToHsaco.cpp or test mlir/test/Integratio
[mlir] Remove mlir-rocm-runnerThis change combines for ROCm what was done for CUDA in D97463, D98203, D98360, and D98396.I did not try to compile SerializeToHsaco.cpp or test mlir/test/Integration/GPU/ROCM because I don't have an AMD card. I fixed the things that had obvious bit-rot though.Reviewed By: whchungDifferential Revision: https://reviews.llvm.org/D98447
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[mlir] replace LLVM dialect float types with built-insContinue the convergence between LLVM dialect and built-in types by replacingthe bfloat, half, float and double LLVM dialect types with their
[mlir] replace LLVM dialect float types with built-insContinue the convergence between LLVM dialect and built-in types by replacingthe bfloat, half, float and double LLVM dialect types with their built-incounterparts. At the API level, this is a direct replacement. At the syntaxlevel, we change the keywords to `bf16`, `f16`, `f32` and `f64`, respectively,to be compatible with the built-in type syntax. The old keywords can still beparsed but produce a deprecation warning and will be eventually removed.Depends On D94178Reviewed By: mehdi_amini, silvas, antiagainstDifferential Revision: https://reviews.llvm.org/D94179
[mlir] switch the modeling of LLVM types to use the new mechanismA new first-party modeling for LLVM IR types in the LLVM dialect has beendeveloped in parallel to the existing modeling based on wr
[mlir] switch the modeling of LLVM types to use the new mechanismA new first-party modeling for LLVM IR types in the LLVM dialect has beendeveloped in parallel to the existing modeling based on wrapping LLVM `Type *`instances. It resolves the long-standing problem of modeling identifiedstructure types, including recursive structures, and enables future removal ofLLVMContext and related locking mechanisms from LLVMDialect.This commit only switches the modeling by (a) renaming LLVMTypeNew to LLVMType,(b) removing the old implementaiton of LLVMType, and (c) updating the tests. Itis intentionally minimal. Separate commits will remove the infrastructure builtfor the transition and update API uses where appropriate.Depends On D85020Reviewed By: rriddleDifferential Revision: https://reviews.llvm.org/D85021
[mlir][gpu][mlir-cuda-runner] Refactor ConvertKernelFuncToCubin to be generic.Make ConvertKernelFuncToCubin pass to be generic:- Rename to ConvertKernelFuncToBlob.- Allow specifying triple, targ
[mlir][gpu][mlir-cuda-runner] Refactor ConvertKernelFuncToCubin to be generic.Make ConvertKernelFuncToCubin pass to be generic:- Rename to ConvertKernelFuncToBlob.- Allow specifying triple, target chip, target features.- Initializing LLVM backend is supplied by a callback function.- Lowering process from MLIR module to LLVM module is via another callback.- Change mlir-cuda-runner to adopt the revised pass.- Add new tests for lowering to ROCm HSA code object (HSACO).- Tests for CUDA and ROCm are kept in separate directories.Differential Revision: https://reviews.llvm.org/D80142