|
Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init |
|
| #
136d746e |
| 11-Jul-2022 |
Jacques Pienaar <[email protected]> |
[mlir] Flip accessors to prefixed form (NFC)
Another mechanical sweep to keep diff small for flip to _Prefixed.
|
| #
04235d07 |
| 28-Jun-2022 |
Jacques Pienaar <[email protected]> |
[mlir] Update flipped accessors (NFC)
Follow up with memref flipped and flipping any intermediate changes made.
|
|
Revision tags: llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1 |
|
| #
7c38fd60 |
| 28-Mar-2022 |
Jacques Pienaar <[email protected]> |
[mlir] Flip Vector dialect accessors used to prefixed form.
This has been on _Both for a couple of weeks. Flip usages in core with intention to flip flag to _Prefixed in follow up. Needed to add a c
[mlir] Flip Vector dialect accessors used to prefixed form.
This has been on _Both for a couple of weeks. Flip usages in core with intention to flip flag to _Prefixed in follow up. Needed to add a couple of helper methods in AffineOps and Linalg to facilitate a pure flag flip in follow up as some of these classes are used in templates and so sensitive to Vector dialect changes.
Differential Revision: https://reviews.llvm.org/D122151
show more ...
|
|
Revision tags: llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3 |
|
| #
11a7635b |
| 08-Mar-2022 |
River Riddle <[email protected]> |
[mlir][NFC] Properly include PassDetail.h for FoldSubViewOpsPass
|
|
Revision tags: llvmorg-14.0.0-rc2 |
|
| #
34ff99a0 |
| 10-Feb-2022 |
Tres Popp <[email protected]> |
Revert "[MLIR] Fix fold-memref-subview-ops for affine.load/store"
This reverts commit ac6cb41303450b4cf8b5c71b971b729990b93a36.
This code has a stack-use-after-scope error that can be seen with asa
Revert "[MLIR] Fix fold-memref-subview-ops for affine.load/store"
This reverts commit ac6cb41303450b4cf8b5c71b971b729990b93a36.
This code has a stack-use-after-scope error that can be seen with asan.
show more ...
|
|
Revision tags: llvmorg-14.0.0-rc1, llvmorg-15-init |
|
| #
ac6cb413 |
| 31-Jan-2022 |
Uday Bondhugula <[email protected]> |
[MLIR] Fix fold-memref-subview-ops for affine.load/store
Fix fold-memref-subview-ops for affine.load/store. We need to expand out the affine apply on its operands.
Differential Revision: https://re
[MLIR] Fix fold-memref-subview-ops for affine.load/store
Fix fold-memref-subview-ops for affine.load/store. We need to expand out the affine apply on its operands.
Differential Revision: https://reviews.llvm.org/D119402
show more ...
|
| #
6635c12a |
| 06-Feb-2022 |
Benjamin Kramer <[email protected]> |
[mlir] Use SmallBitVector instead of SmallDenseSet for AffineMap::compressSymbols
This is both more efficient and more ergonomic to use, as inverting a bit vector is trivial while inverting a set is
[mlir] Use SmallBitVector instead of SmallDenseSet for AffineMap::compressSymbols
This is both more efficient and more ergonomic to use, as inverting a bit vector is trivial while inverting a set is annoying.
Sadly this leaks into a bunch of APIs downstream, so adapt them as well.
This would be NFC, but there is an ordering dependency in MemRefOps's computeMemRefRankReductionMask. This is now deterministic, previously it was dependent on SmallDenseSet's unspecified iteration order.
Differential Revision: https://reviews.llvm.org/D119076
show more ...
|
| #
ead11072 |
| 26-Jan-2022 |
River Riddle <[email protected]> |
[mlir] Move StandardOps/Utils to Arithmetic and sever a bunch of dependencies on Standard
The Utils.cpp file in StandardOps essentially just contains utilities for interacting with arithmetic operat
[mlir] Move StandardOps/Utils to Arithmetic and sever a bunch of dependencies on Standard
The Utils.cpp file in StandardOps essentially just contains utilities for interacting with arithmetic operations, and at this point makes more sense as a utility file for the arithemtic dialect.
Differential Revision: https://reviews.llvm.org/D118280
show more ...
|
| #
99ef9eeb |
| 31-Jan-2022 |
Matthias Springer <[email protected]> |
[mlir][vector][NFC] Split into IR, Transforms and Utils
This reduces the dependencies of the MLIRVector target and makes the dialect consistent with other dialects.
Differential Revision: https://r
[mlir][vector][NFC] Split into IR, Transforms and Utils
This reduces the dependencies of the MLIRVector target and makes the dialect consistent with other dialects.
Differential Revision: https://reviews.llvm.org/D118533
show more ...
|
| #
f8a2cd67 |
| 30-Jan-2022 |
Uday Bondhugula <[email protected]> |
Support affine.load/store ops in fold-memref-subview-ops pass
Support affine.load/store ops in fold-memref-subview ops pass. The existing pass just "inlines" the subview operation on load/stores by
Support affine.load/store ops in fold-memref-subview-ops pass
Support affine.load/store ops in fold-memref-subview ops pass. The existing pass just "inlines" the subview operation on load/stores by inserting affine.apply ops in front of the memref load/store ops: this is by design always consistent with the semantics on affine.load/store ops and the same would work even more naturally/intuitively with the latter.
Differential Revision: https://reviews.llvm.org/D118565
show more ...
|
|
Revision tags: llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2 |
|
| #
c537a943 |
| 01-Dec-2021 |
Nicolas Vasilache <[email protected]> |
[mlir][Vector] Thread 0-d vectors through vector.transfer ops
This revision adds 0-d vector support to vector.transfer ops. In the process, numerous cleanups are applied, in particular around normal
[mlir][Vector] Thread 0-d vectors through vector.transfer ops
This revision adds 0-d vector support to vector.transfer ops. In the process, numerous cleanups are applied, in particular around normalizing and reducing the number of builders.
Reviewed By: ThomasRaoux, springerm
Differential Revision: https://reviews.llvm.org/D114803
show more ...
|
|
Revision tags: llvmorg-13.0.1-rc1 |
|
| #
a54f4eae |
| 12-Oct-2021 |
Mogball <[email protected]> |
[MLIR] Replace std ops with arith dialect ops
Precursor: https://reviews.llvm.org/D110200
Removed redundant ops from the standard dialect that were moved to the `arith` or `math` dialects.
Renamed
[MLIR] Replace std ops with arith dialect ops
Precursor: https://reviews.llvm.org/D110200
Removed redundant ops from the standard dialect that were moved to the `arith` or `math` dialects.
Renamed all instances of operations in the codebase and in tests.
Reviewed By: rriddle, jpienaar
Differential Revision: https://reviews.llvm.org/D110797
show more ...
|
| #
b12e4c17 |
| 28-Sep-2021 |
thomasraoux <[email protected]> |
[mlir] Fix bug in FoldSubview with rank reducing subview
Fix how we calculate the new permutation map of the transfer ops.
Differential Revision: https://reviews.llvm.org/D110638
|
|
Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4 |
|
| #
4cf9bf6c |
| 20-Sep-2021 |
MaheshRavishankar <[email protected]> |
[mlir][MemRef] Compute unused dimensions of a rank-reducing subviews using strides as well.
For `memref.subview` operations, when there are more than one unit-dimensions, the strides need to be used
[mlir][MemRef] Compute unused dimensions of a rank-reducing subviews using strides as well.
For `memref.subview` operations, when there are more than one unit-dimensions, the strides need to be used to figure out which of the unit-dims are actually dropped.
Differential Revision: https://reviews.llvm.org/D109418
show more ...
|
|
Revision tags: llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1 |
|
| #
fd15e2b8 |
| 03-May-2021 |
MaheshRavishankar <[email protected]> |
[mlir][Linalg] Use rank-reduced versions of subtensor and subtensor insert when possible.
Convert subtensor and subtensor_insert operations to use their rank-reduced versions to drop unit dimensions
[mlir][Linalg] Use rank-reduced versions of subtensor and subtensor insert when possible.
Convert subtensor and subtensor_insert operations to use their rank-reduced versions to drop unit dimensions.
Differential Revision: https://reviews.llvm.org/D101495
show more ...
|
| #
41849a91 |
| 28-Apr-2021 |
MaheshRavishankar <[email protected]> |
[mlir][Linalg] Avoid changing the rank of the result in canonicalizations of subtensor.
Canonicalizations for subtensor operations defaulted to use the rank-reduced version of the operation, but the
[mlir][Linalg] Avoid changing the rank of the result in canonicalizations of subtensor.
Canonicalizations for subtensor operations defaulted to use the rank-reduced version of the operation, but the cast inserted to get back the original type would be illegal if the rank was actually reduced. Instead make the canonicalization not reduce the rank of the operation.
Differential Revision: https://reviews.llvm.org/D101258
show more ...
|
| #
0deeaaca |
| 12-Apr-2021 |
Lei Zhang <[email protected]> |
[mlir] Move memref.subview patterns to MemRef/Transforms/
These patterns have been used as a prerequisite step for lowering to SPIR-V. But they don't involve SPIR-V dialect ops; they are pure memref
[mlir] Move memref.subview patterns to MemRef/Transforms/
These patterns have been used as a prerequisite step for lowering to SPIR-V. But they don't involve SPIR-V dialect ops; they are pure memref/vector op transformations. Given now we have a dedicated MemRef dialect, moving them to Memref/Transforms/, which is a more suitable place to host them, to allow used by others.
This commit just moves code around and renames patterns/passes accordingly. CMakeLists.txt for existing MemRef libraries are also improved along the way.
Reviewed By: mravishankar
Differential Revision: https://reviews.llvm.org/D100326
show more ...
|