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Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1, llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1, llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4 |
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35bf23e9 |
| 09-Mar-2021 |
Alex Richardson <[email protected]> |
Avoid shuffle self-assignment in EXPENSIVE_CHECKS builds
Some versions of libstdc++ perform self-assignment in std::shuffle. This breaks the EXPENSIVE_CHECKS builds of TableGen due to an incorrect a
Avoid shuffle self-assignment in EXPENSIVE_CHECKS builds
Some versions of libstdc++ perform self-assignment in std::shuffle. This breaks the EXPENSIVE_CHECKS builds of TableGen due to an incorrect assertion in libstdc++.
See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85828.
Fixes https://llvm.org/PR37652
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D98167
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Revision tags: llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2 |
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9d2f0644 |
| 19-Feb-2021 |
Qiu Chaofan <[email protected]> |
[llvm-exegesis] Ignore instructions using custom inserter
Some instructions defined in table-gen files sets usesCustomInserter bit, which means it has to be lowered by target code and isn't actually
[llvm-exegesis] Ignore instructions using custom inserter
Some instructions defined in table-gen files sets usesCustomInserter bit, which means it has to be lowered by target code and isn't actually valid instruction at MC level. So we should treat them like pseudo instructions.
Reviewed By: gchatelet
Differential Revision: https://reviews.llvm.org/D94898
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Revision tags: llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1, llvmorg-11.0.1, llvmorg-11.0.1-rc2, llvmorg-11.0.1-rc1 |
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24bf8faa |
| 29-Oct-2020 |
Clement Courbet <[email protected]> |
[llvm-exegesis] Do not try to assign random registers twice.
Doing a random assignment assigns both tested (forward) and back-to-back (backward) instructions.
When none of the tested instruction an
[llvm-exegesis] Do not try to assign random registers twice.
Doing a random assignment assigns both tested (forward) and back-to-back (backward) instructions.
When none of the tested instruction and back-to-back instruction have implicit aliasing, we're currently trying to do a random register asignment twice.
Fix this (see PR26418).
Differential Revision: https://reviews.llvm.org/D90380
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Revision tags: llvmorg-11.0.0, llvmorg-11.0.0-rc6, llvmorg-11.0.0-rc5, llvmorg-11.0.0-rc4, llvmorg-11.0.0-rc3, llvmorg-11.0.0-rc2, llvmorg-11.0.0-rc1, llvmorg-12-init, llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3, llvmorg-10.0.1-rc2, llvmorg-10.0.1-rc1, llvmorg-10.0.0, llvmorg-10.0.0-rc6, llvmorg-10.0.0-rc5, llvmorg-10.0.0-rc4, llvmorg-10.0.0-rc3, llvmorg-10.0.0-rc2 |
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6030fe01 |
| 12-Feb-2020 |
Roman Lebedev <[email protected]> |
[llvm-exegesis] Exploring X86::OperandType::OPERAND_COND_CODE
Summary: Currently, we only have nice exploration for LEA instruction, while for the rest, we rely on `randomizeUnsetVariables()` to som
[llvm-exegesis] Exploring X86::OperandType::OPERAND_COND_CODE
Summary: Currently, we only have nice exploration for LEA instruction, while for the rest, we rely on `randomizeUnsetVariables()` to sometimes generate something interesting. While that works, it isn't very reliable in coverage :)
Here, i'm making an assumption that while we may want to explore multi-instruction configs, we are most interested in the characteristics of the main instruction we were asked about.
Which we can do, by taking the existing `randomizeMCOperand()`, and turning it on it's head - instead of relying on it to randomly fill one of the interesting values, let's pregenerate all the possible interesting values for the variable, and then generate as much `InstructionTemplate` combinations of these possible values for variables as needed/possible.
Of course, that requires invasive changes to no longer pass just the naked `Instruction`, but sometimes partially filled `InstructionTemplate`.
As it can be seen from the test, this allows us to explore `X86::OperandType::OPERAND_COND_CODE` for instructions that take such an operand. I'm hoping this will greatly simplify exploration.
Reviewers: courbet, gchatelet
Reviewed By: gchatelet
Subscribers: orodley, mgorny, sdardis, tschuett, jrtc27, atanasyan, mstojanovic, andreadb, RKSimon, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D74156
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c55cf4af |
| 10-Feb-2020 |
Bill Wendling <[email protected]> |
Revert "Remove redundant "std::move"s in return statements"
The build failed with
error: call to deleted constructor of 'llvm::Error'
errors.
This reverts commit 1c2241a7936bf85aa68aef94bd40c3b
Revert "Remove redundant "std::move"s in return statements"
The build failed with
error: call to deleted constructor of 'llvm::Error'
errors.
This reverts commit 1c2241a7936bf85aa68aef94bd40c3ba77d8ddf2.
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1c2241a7 |
| 10-Feb-2020 |
Bill Wendling <[email protected]> |
Remove redundant "std::move"s in return statements
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Revision tags: llvmorg-10.0.0-rc1 |
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adcd0268 |
| 28-Jan-2020 |
Benjamin Kramer <[email protected]> |
Make llvm::StringRef to std::string conversions explicit.
This is how it should've been and brings it more in line with std::string_view. There should be no functional change here.
This is mostly m
Make llvm::StringRef to std::string conversions explicit.
This is how it should've been and brings it more in line with std::string_view. There should be no functional change here.
This is mostly mechanical from a custom clang-tidy check, with a lot of manual fixups. It uncovers a lot of minor inefficiencies.
This doesn't actually modify StringRef yet, I'll do that in a follow-up.
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e8fc8507 |
| 23-Jan-2020 |
Miloš Stojanović <[email protected]> |
[llvm-exegesis] Don't use unsupported aliasing instructions
Since some instruction types aren't allowed as the main instruction also don't allow them for aliasing instructions.
Differential Revisio
[llvm-exegesis] Don't use unsupported aliasing instructions
Since some instruction types aren't allowed as the main instruction also don't allow them for aliasing instructions.
Differential Revision: https://reviews.llvm.org/D73220
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6d2510d3 |
| 23-Jan-2020 |
Clement Courbet <[email protected]> |
[llvm-exegesis] Restrict to allowed back-to-back instructions in SerialSnippetGenerator.
Summary: Followup to D73161.
Reviewers: gchatelet, mstojanovic
Subscribers: tschuett, llvm-commits
Tags: #
[llvm-exegesis] Restrict to allowed back-to-back instructions in SerialSnippetGenerator.
Summary: Followup to D73161.
Reviewers: gchatelet, mstojanovic
Subscribers: tschuett, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73256
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24b7b99b |
| 17-Jan-2020 |
Miloš Stojanović <[email protected]> |
[llvm-exegesis][NFC] Disassociate snippet generators from benchmark runners
The addition of `inverse_throughput` mode highlighted the disjointedness of snippet generators and benchmark runners becau
[llvm-exegesis][NFC] Disassociate snippet generators from benchmark runners
The addition of `inverse_throughput` mode highlighted the disjointedness of snippet generators and benchmark runners because it used the `UopsSnippetGenerator` with the `LatencyBenchmarkRunner`. To keep the code consistent tie the snippet generators to parallelization/serialization rather than their benchmark runners.
Renaming `LatencySnippetGenerator` -> `SerialSnippetGenerator`. Renaming `UopsSnippetGenerator` -> `ParallelSnippetGenerator`.
Differential Revision: https://reviews.llvm.org/D72928
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