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Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4 |
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cd61d4bd |
| 20-May-2022 |
Florian Hahn <[email protected]> |
[LV] Do not LoopSimplify/LCSSA after generating main vector loop.
At the moment LV runs LoopSimplify and reconstructs LCSSA form after generating the main vector loop and before generating the epilo
[LV] Do not LoopSimplify/LCSSA after generating main vector loop.
At the moment LV runs LoopSimplify and reconstructs LCSSA form after generating the main vector loop and before generating the epilogue vector loop.
In practice, this adds a new exit block for the scalar loop because the middle block now also branches to the original exit block of the scalar loop. It also requires adding a new LCSSA phi in the newly created exit block.
This complicates things when modeling exit values in VPlan, because we would need to update the VPlan for the epilogue loop to update the newly created LCSSA phi node.
But none of that should be necessary, as all analysis requiring loop-simplify form is already done at this point and LCSSA form of the original loop is not broken.
Reviewed By: bmahjour
Differential Revision: https://reviews.llvm.org/D125810
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Revision tags: llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1 |
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1ff022e2 |
| 05-Apr-2022 |
Florian Hahn <[email protected]> |
[LV] Add vector.body block to parent loop during skeleton creation.
When creating induction resume values, SCEV queries may rely on LoopInfo. Make sure vector.body gets added to the loop of the pre-
[LV] Add vector.body block to parent loop during skeleton creation.
When creating induction resume values, SCEV queries may rely on LoopInfo. Make sure vector.body gets added to the loop of the pre-header during skeleton construction.
%vector.body will be moved to the vector preheader during VPlan execution.
Fixes #54745.
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872f7000 |
| 03-Apr-2022 |
Dávid Bolvanský <[email protected]> |
Revert "[NFCI] Regenerate SROA/LoopVectorize test checks"
This reverts commit 14e3450fb57305aa9ff3e9e60687b458e43835c9.
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a113a582 |
| 03-Apr-2022 |
Dávid Bolvanský <[email protected]> |
[NFCI] Regenerate LoopVectorize test checks
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Revision tags: llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2 |
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b3e8ace1 |
| 28-Feb-2022 |
Florian Hahn <[email protected]> |
Recommit "[VPlan] Introduce recipe to build scalar steps."
This reverts the revert commit ff93260bf6bddfbad1fa65c4d5184988885b900f.
The underlying issue causing the PPC bot failures has been fixed
Recommit "[VPlan] Introduce recipe to build scalar steps."
This reverts the revert commit ff93260bf6bddfbad1fa65c4d5184988885b900f.
The underlying issue causing the PPC bot failures has been fixed in cbaac1473403 and a corresponding test case has been added in ad2cad1c521c.
Original message:
This patch adds a new VPScalarIVStepsRecipe to handle building scalar steps.
In the first patch, it only handles the case where there is no vector induction variable needed.
Reviewed By: Ayal
Differential Revision: https://reviews.llvm.org/D115953
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ff93260b |
| 27-Feb-2022 |
Florian Hahn <[email protected]> |
Revert "[VPlan] Introduce recipe to build scalar steps."
This reverts commit 49b23f451cf713036c99573a35daed308d2ac894.
This appears to break some PPC build bots. Revert while I investigate.
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49b23f45 |
| 27-Feb-2022 |
Florian Hahn <[email protected]> |
[VPlan] Introduce recipe to build scalar steps.
This patch adds a new VPScalarIVStepsRecipe to handle building scalar steps.
In the first patch, it only handles the case where there is no vector in
[VPlan] Introduce recipe to build scalar steps.
This patch adds a new VPScalarIVStepsRecipe to handle building scalar steps.
In the first patch, it only handles the case where there is no vector induction variable needed.
Reviewed By: Ayal
Differential Revision: https://reviews.llvm.org/D115953
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Revision tags: llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2 |
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7f1bf68d |
| 06-Jan-2022 |
Florian Hahn <[email protected]> |
[SCEVExpander] Only check overflow if it is needed.
9345ab3a4550 updated generateOverflowCheck to skip creating checks that always evaluate to false. This in turn means that we only need to check fo
[SCEVExpander] Only check overflow if it is needed.
9345ab3a4550 updated generateOverflowCheck to skip creating checks that always evaluate to false. This in turn means that we only need to check for overflows if the result of the multiplication is actually used.
Sink the Or for the overflow check into ComputeEndCheck, so it is only created when there's an actual check.
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f395a4f8 |
| 07-Jan-2022 |
Florian Hahn <[email protected]> |
[SCEVExpand] Only create required predicate checks.
Currently generateOverflowCheck always creates code for Step being negative and positive, followed by a select at the end depending on Step's sign
[SCEVExpand] Only create required predicate checks.
Currently generateOverflowCheck always creates code for Step being negative and positive, followed by a select at the end depending on Step's sign.
This patch updates the code to only create either the checks for step being positive or negative, if the sign is known.
Follow-up to D116696.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D116747
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86d113a8 |
| 06-Jan-2022 |
Florian Hahn <[email protected]> |
[SCEVExpand] Do not create redundant 'or false' for pred expansion.
This patch updates SCEVExpander::expandUnionPredicate to not create redundant 'or false, x' instructions. While those are triviall
[SCEVExpand] Do not create redundant 'or false' for pred expansion.
This patch updates SCEVExpander::expandUnionPredicate to not create redundant 'or false, x' instructions. While those are trivially foldable, they can be easily avoided and hinder code that checks the size/cost of the generated checks before further folds.
I am planning on look into a few other similar improvements to code generated by SCEVExpander.
I remember a while ago @lebedev.ri working on doing some trivial folds like that in IRBuilder itself, but there where concerns that such changes may subtly break existing code.
Reviewed By: reames, lebedev.ri
Differential Revision: https://reviews.llvm.org/D116696
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Revision tags: llvmorg-13.0.1-rc1 |
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b2915971 |
| 27-Oct-2021 |
Roman Lebedev <[email protected]> |
Revert rest of `IRBuilderBase`'s short-circuiting folds
Upon further investigation and discussion, this is actually the opposite direction from what we should be taking, and this direction wouldn't
Revert rest of `IRBuilderBase`'s short-circuiting folds
Upon further investigation and discussion, this is actually the opposite direction from what we should be taking, and this direction wouldn't solve the motivational problem anyway.
Additionally, some more (polly) tests have escaped being updated. So, let's just take a step back here.
This reverts commit f3190dedeef9da2109ea57e4cb372f295ff53b88. This reverts commit 749581d21f2b3f53e4fca4eb8728c942d646893b. This reverts commit f3df87d57e096143670e0fd396e81d43393a2dd2. This reverts commit ab1dbcecd6f0969976fafd62af34730436ad5944.
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f3df87d5 |
| 27-Oct-2021 |
Roman Lebedev <[email protected]> |
[IR] `IRBuilderBase::CreateOr()`: fix short-circuiting for constant on LHS
There is no guarantee that the constant is on RHS here, we have to handle both cases.
Refs. https://reviews.llvm.org/D1093
[IR] `IRBuilderBase::CreateOr()`: fix short-circuiting for constant on LHS
There is no guarantee that the constant is on RHS here, we have to handle both cases.
Refs. https://reviews.llvm.org/D109368#3089809
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ab1dbcec |
| 27-Oct-2021 |
Roman Lebedev <[email protected]> |
[IR] `IRBuilderBase::CreateSelect()`: if cond is a constant i1, short-circuit
While we could emit such a tautological `select`, it will stick around until the next instsimplify invocation, which may
[IR] `IRBuilderBase::CreateSelect()`: if cond is a constant i1, short-circuit
While we could emit such a tautological `select`, it will stick around until the next instsimplify invocation, which may happen after we count the cost of this redundant `select`. Which is precisely what happens with loop vectorization legality checks, and that artificially increases the cost of said checks, which is bad.
There is prior art for this in `IRBuilderBase::CreateAnd()`/`IRBuilderBase::CreateOr()`.
Refs. https://reviews.llvm.org/D109368#3089809
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5a8a7b3b |
| 27-Oct-2021 |
Roman Lebedev <[email protected]> |
[NFC] Re-autogenerate check lines in some tests to ease of future update
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2 |
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23c2f2e6 |
| 07-Jun-2021 |
Florian Hahn <[email protected]> |
[LV] Mark increment of main vector loop induction variable as NUW.
This patch marks the induction increment of the main induction variable of the vector loop as NUW when not folding the tail.
If th
[LV] Mark increment of main vector loop induction variable as NUW.
This patch marks the induction increment of the main induction variable of the vector loop as NUW when not folding the tail.
If the tail is not folded, we know that End - Start >= Step (either statically or through the minimum iteration checks). We also know that both Start % Step == 0 and End % Step == 0. We exit the vector loop if %IV + %Step == %End. Hence we must exit the loop before %IV + %Step unsigned overflows and we can mark the induction increment as NUW.
This should make SCEV return more precise bounds for the created vector loops, used by later optimizations, like late unrolling.
At the moment quite a few tests still need to be updated, but before doing so I'd like to get initial feedback to make sure I am not missing anything.
Note that this could probably be further improved by using information from the original IV.
Attempt of modeling of the assumption in Alive2: https://alive2.llvm.org/ce/z/H_DL_g
Part of a set of fixes required for PR50412.
Reviewed By: mkazantsev
Differential Revision: https://reviews.llvm.org/D103255
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Revision tags: llvmorg-12.0.1-rc1, llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2, llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2 |
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6699029b |
| 21-Jan-2021 |
Arthur Eubanks <[email protected]> |
[NewPM][opt] Run the "default" AA pipeline by default
We tend to assume that the AA pipeline is by default the default AA pipeline and it's confusing when it's empty instead.
PR48779
Initially rev
[NewPM][opt] Run the "default" AA pipeline by default
We tend to assume that the AA pipeline is by default the default AA pipeline and it's confusing when it's empty instead.
PR48779
Initially reverted due to BasicAA running analyses in an unspecified order (multiple function calls as parameters), fixed by fetching analyses before the call to construct BasicAA.
Reviewed By: asbirlea
Differential Revision: https://reviews.llvm.org/D95117
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ba9b4ea4 |
| 22-Jan-2021 |
Arthur Eubanks <[email protected]> |
Revert "[NewPM][opt] Run the "default" AA pipeline by default"
This reverts commit be611431cd1f5c826a55b531db92a63e84323866.
Other/new-pm-lto-defaults.ll failing
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be611431 |
| 21-Jan-2021 |
Arthur Eubanks <[email protected]> |
[NewPM][opt] Run the "default" AA pipeline by default
We tend to assume that the AA pipeline is by default the default AA pipeline and it's confusing when it's empty instead.
PR48779
Reviewed By:
[NewPM][opt] Run the "default" AA pipeline by default
We tend to assume that the AA pipeline is by default the default AA pipeline and it's confusing when it's empty instead.
PR48779
Reviewed By: asbirlea
Differential Revision: https://reviews.llvm.org/D95117
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Revision tags: llvmorg-11.1.0-rc1 |
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278aa65c |
| 24-Dec-2020 |
Juneyoung Lee <[email protected]> |
[IR] Let IRBuilder's CreateVectorSplat/CreateShuffleVector use poison as placeholder
This patch updates IRBuilder to create insertelement/shufflevector using poison as a placeholder.
Reviewed By: n
[IR] Let IRBuilder's CreateVectorSplat/CreateShuffleVector use poison as placeholder
This patch updates IRBuilder to create insertelement/shufflevector using poison as a placeholder.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D93793
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Revision tags: llvmorg-11.0.1, llvmorg-11.0.1-rc2 |
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a7e2c269 |
| 02-Dec-2020 |
Bardia Mahjour <[email protected]> |
[LV] Epilogue Vectorization with Optimal Control Flow (Recommit)
This is yet another attempt at providing support for epilogue vectorization following discussions raised in RFC http://llvm.1065342.n
[LV] Epilogue Vectorization with Optimal Control Flow (Recommit)
This is yet another attempt at providing support for epilogue vectorization following discussions raised in RFC http://llvm.1065342.n5.nabble.com/llvm-dev-Proposal-RFC-Epilog-loop-vectorization-tt106322.html#none and reviews D30247 and D88819.
Similar to D88819, this patch achieve epilogue vectorization by executing a single vplan twice: once on the main loop and a second time on the epilogue loop (using a different VF). However it's able to handle more loops, and generates more optimal control flow for cases where the trip count is too small to execute any code in vector form.
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D89566
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9c5504ad |
| 01-Dec-2020 |
Bardia Mahjour <[email protected]> |
[LV] Epilogue Vectorization with Optimal Control Flow
This is yet another attempt at providing support for epilogue vectorization following discussions raised in RFC http://llvm.1065342.n5.nabble.co
[LV] Epilogue Vectorization with Optimal Control Flow
This is yet another attempt at providing support for epilogue vectorization following discussions raised in RFC http://llvm.1065342.n5.nabble.com/llvm-dev-Proposal-RFC-Epilog-loop-vectorization-tt106322.html#none and reviews D30247 and D88819.
Similar to D88819, this patch achieve epilogue vectorization by executing a single vplan twice: once on the main loop and a second time on the epilogue loop (using a different VF). However it's able to handle more loops, and generates more optimal control flow for cases where the trip count is too small to execute any code in vector form.
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D89566
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