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Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3 |
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65d5beca |
| 26-Apr-2022 |
Jeremy Morse <[email protected]> |
Reapply D124184, [DebugInfo][InstrRef] Add a size operand to DBG_PHI
This was reverted twice, in 987cd7c3ed75b and 13815e8cbf8d4. The latter stemed from not accounting for rare register classes in a
Reapply D124184, [DebugInfo][InstrRef] Add a size operand to DBG_PHI
This was reverted twice, in 987cd7c3ed75b and 13815e8cbf8d4. The latter stemed from not accounting for rare register classes in a pre-allocated array, and the former from an array not being completely initialized, leading to asan complaining.
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Revision tags: llvmorg-14.0.2 |
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987cd7c3 |
| 25-Apr-2022 |
Jeremy Morse <[email protected]> |
Revert "Reapply D124184, [DebugInfo][InstrRef] Add a size operand to DBG_PHI"
This reverts commit 5db925023169f8a19419e68153682d1e518f8392.
Further to the early revert, the sanitizers have found so
Revert "Reapply D124184, [DebugInfo][InstrRef] Add a size operand to DBG_PHI"
This reverts commit 5db925023169f8a19419e68153682d1e518f8392.
Further to the early revert, the sanitizers have found something wrong with this.
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5db92502 |
| 25-Apr-2022 |
Jeremy Morse <[email protected]> |
Reapply D124184, [DebugInfo][InstrRef] Add a size operand to DBG_PHI
This was applied in fda4305e53784, reverted in 13815e8cbf8d49, the problem was that fp80 X86 registers that were spilt to the sta
Reapply D124184, [DebugInfo][InstrRef] Add a size operand to DBG_PHI
This was applied in fda4305e53784, reverted in 13815e8cbf8d49, the problem was that fp80 X86 registers that were spilt to the stack aren't expected by LiveDebugValues. It pre-allocates a position number for all register sizes that can be spilt, and 80 bits isn't exactly common.
The solution is to scan the register classes to find any unrecognised register sizes, adn pre-allocate those position numbers, avoiding a later assertion.
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13815e8c |
| 25-Apr-2022 |
Jeremy Morse <[email protected]> |
Revert "[DebugInfo][InstrRef] Add a size operand to DBG_PHI"
This reverts commit fda4305e5378478051be225248bfe9c1d401d938.
Green dragon has spotted a problem -- it's understood, but might be fiddly
Revert "[DebugInfo][InstrRef] Add a size operand to DBG_PHI"
This reverts commit fda4305e5378478051be225248bfe9c1d401d938.
Green dragon has spotted a problem -- it's understood, but might be fiddly to fix, reverting in the meantime.
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fda4305e |
| 21-Apr-2022 |
Jeremy Morse <[email protected]> |
[DebugInfo][InstrRef] Add a size operand to DBG_PHI
DBG_PHI instructions can refer to stack slots, to indicate that multiple values merge together on control flow joins in that slot. This is fine --
[DebugInfo][InstrRef] Add a size operand to DBG_PHI
DBG_PHI instructions can refer to stack slots, to indicate that multiple values merge together on control flow joins in that slot. This is fine -- however the slot might be merged at a later date with a slot of a different size. In doing so, we lose information about the size the eliminated PHI. Later analysis passes have to guess.
Improve this by attaching an optional "bit size" operand to DBG_PHI, which only gets added for stack slots, to let us know how large a size the value on the stack is.
Differential Revision: https://reviews.llvm.org/D124184
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Revision tags: llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1, llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2 |
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63cc251e |
| 02-Jun-2021 |
Jeremy Morse <[email protected]> |
[DebugInfo][InstrRef][4/4] Support DBG_INSTR_REF through all backend passes
This is a cleanup patch -- we're now able to support all flavours of variable location in instruction referencing mode. Th
[DebugInfo][InstrRef][4/4] Support DBG_INSTR_REF through all backend passes
This is a cleanup patch -- we're now able to support all flavours of variable location in instruction referencing mode. This patch updates various tests for debug instructions to be broader: numerous code paths try to ignore debug isntructions, and they now have to ignore the additional DBG_PHI and DBG_INSTR_REFs that we can generate.
A small amount of rework happens for LiveDebugVariables: as we don't need to track live intervals through regalloc any more, we can get away with unlinking debug instructions before regalloc, then re-inserting them after. Note that this isn't (yet) true of DBG_VALUE_LISTs, they still have to go through live interval tracking.
In SelectionDAG, add a helper lambda that emits half-formed DBG_INSTR_REFs for arguments in instr-ref mode, DBG_VALUE otherwise. This is one of the final locations where DBG_VALUEs are emitted for vreg arguments.
X86InstrInfo now un-sets the debug instr number on SUB instructions that get mutated into CMP instructions. As the instruction no longer computes a subtraction, we can't use it for variable locations.
Differential Revision: https://reviews.llvm.org/D88898
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8496fc2e |
| 26-May-2021 |
Jeremy Morse <[email protected]> |
[DebugInstrRef][1/3] Track PHI values through register allocation
This patch introduces "DBG_PHI" instructions, a marker of where a PHI instruction used to be, before PHI elimination. Under the inst
[DebugInstrRef][1/3] Track PHI values through register allocation
This patch introduces "DBG_PHI" instructions, a marker of where a PHI instruction used to be, before PHI elimination. Under the instruction referencing model, we want to know where every value in the function is defined -- and a PHI, even if implicit, is such a place.
Just like instruction numbers, we can use this to identify a value to be used as a variable value, but we don't need to know what instruction defines that value, for example:
bb1: DBG_PHI $rax, 1 [... more insts ... ] bb2: DBG_INSTR_REF 1, 0, !1234, !DIExpression()
This specifies that on entry to bb1, whatever value is in $rax is known as value number one -- and the later DBG_INSTR_REF marks the position where variable !1234 should take on value number one.
PHI locations are stored in MachineFunction for the duration of the regalloc phase in the DebugPHIPositions map. The map is populated by PHIElimination, and then flushed back into the instruction stream by virtregrewriter. A small amount of maintenence is needed in LiveDebugVariables to account for registers being split, but only for individual positions, not for entire ranges of blocks.
Differential Revision: https://reviews.llvm.org/D86812
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