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# 70726cec 29-Aug-2018 Matt Arsenault <[email protected]>

DAG: Combine extract_vector_elt of concat_vectors

Fixes extra canonicalize regressions when legalizing
vector fminnum/fmaxnum.


# 687ec75d 22-Oct-2018 Matt Arsenault <[email protected]>

DAG: Change behavior of fminnum/fmaxnum nodes

Introduce new versions that follow the IEEE semantics
to help with legalization that may need quieted inputs.

There are some regressions from inserting

DAG: Change behavior of fminnum/fmaxnum nodes

Introduce new versions that follow the IEEE semantics
to help with legalization that may need quieted inputs.

There are some regressions from inserting unnecessary
canonicalizes when these are matched from fast math
fcmp + select which should be fixed in a future commit.

llvm-svn: 344914

show more ...


# bf07a50a 31-Aug-2018 Matt Arsenault <[email protected]>

AMDGPU: Restrict extract_vector_elt combine to loads

The intention is to enable the extract_vector_elt load combine,
and doing this for other operations interferes with more
useful optimizations on

AMDGPU: Restrict extract_vector_elt combine to loads

The intention is to enable the extract_vector_elt load combine,
and doing this for other operations interferes with more
useful optimizations on vectors.

Handle any type of load since in principle we should do the
same combine for the various load intrinsics.

llvm-svn: 341219

show more ...


Revision tags: llvmorg-7.0.0-rc2
# a8160737 15-Aug-2018 Matt Arsenault <[email protected]>

AMDGPU: Improve extract_vector_elt reduction combine

Handle fmul, fsub and preserve flags.

Also really test minnum/maxnum reductions.
The existing tests were only checking from
minnum/maxnum matche

AMDGPU: Improve extract_vector_elt reduction combine

Handle fmul, fsub and preserve flags.

Also really test minnum/maxnum reductions.
The existing tests were only checking from
minnum/maxnum matched from a fast math compare
and select which is not the same.

llvm-svn: 339820

show more ...


Revision tags: llvmorg-7.0.0-rc1, llvmorg-6.0.1, llvmorg-6.0.1-rc3, llvmorg-6.0.1-rc2
# 1349a04e 22-May-2018 Matt Arsenault <[email protected]>

AMDGPU: Make v2i16/v2f16 legal on VI

This usually results in better code. Fixes using
inline asm with short2, and also fixes having a different
ABI for function parameters between VI and gfx9.

Part

AMDGPU: Make v2i16/v2f16 legal on VI

This usually results in better code. Fixes using
inline asm with short2, and also fixes having a different
ABI for function parameters between VI and gfx9.

Partially cleans up the mess used for lowering of the d16
operations. Making v4f16 legal will help clean this up more,
but this requires additional work.

llvm-svn: 332953

show more ...


# e24f3ff8 09-May-2018 Farhana Aleen <[email protected]>

[AMDGPU] Support horizontal vectorization of min/max.

Author: FarhanaAleen

Reviewed By: rampitec

Subscribers: AMDGPU

Differential Revision: https://reviews.llvm.org/D46604

llvm-svn: 331920


# e2dfe8a8 01-May-2018 Farhana Aleen <[email protected]>

[AMDGPU] Support horizontal vectorization.

Author: FarhanaAleen

Reviewed By: rampitec, arsenm

Subscribers: llvm-commits, AMDGPU

Differential Revision: https://reviews.llvm.org/D46213

llvm-svn: 3

[AMDGPU] Support horizontal vectorization.

Author: FarhanaAleen

Reviewed By: rampitec, arsenm

Subscribers: llvm-commits, AMDGPU

Differential Revision: https://reviews.llvm.org/D46213

llvm-svn: 331313

show more ...