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Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init |
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57006b14 |
| 02-Jul-2022 |
Xiang Li <[email protected]> |
[DirectX backend] [NFC]Add DXILOpBuilder to generate DXIL operation
A new helper class DXILOpBuilder is added to create DXIL op function calls.
TableGen backend for DXILOperation will create table
[DirectX backend] [NFC]Add DXILOpBuilder to generate DXIL operation
A new helper class DXILOpBuilder is added to create DXIL op function calls.
TableGen backend for DXILOperation will create table for DXIL op function parameter types.
When create DXIL op function, these parameter types will used to create the function type.
Reviewed By: bogner
Differential Revision: https://reviews.llvm.org/D130291
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Revision tags: llvmorg-14.0.6 |
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43dc3190 |
| 16-Jun-2022 |
Xiang Li <[email protected]> |
[DirectX] add thread/group id DXIL operations.
Add DXIL operation for thread/group id operations.
ID Name Description
93 ThreadId reads the thread ID
94 Gro
[DirectX] add thread/group id DXIL operations.
Add DXIL operation for thread/group id operations.
ID Name Description
93 ThreadId reads the thread ID
94 GroupId reads the group ID (SV_GroupID)
95 ThreadIdInGroup reads the thread ID within the group (SV_GroupThreadID)
96 FlattenedThreadIdInGroup provides a flattened index for a given thread within a given group (SV_GroupIndex)
Also add llvm intrinsic which map to these intrinsics to DXIL operation.
Reviewed By: beanz
Differential Revision: https://reviews.llvm.org/D127990
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0d2dde20 |
| 16-Jun-2022 |
Xiang Li <[email protected]> |
[TableGen][DirectX] generate DXIL operation table with TableGen.
Add more feature to tableGen backend gen-dxil-operation.
It will generate getOpCodeProperty, getOpCodeClassName and getOpCodeName wh
[TableGen][DirectX] generate DXIL operation table with TableGen.
Add more feature to tableGen backend gen-dxil-operation.
It will generate getOpCodeProperty, getOpCodeClassName and getOpCodeName when build DirectX target.
Each of these functions has a table which generate based on DXIL operations.
These generated functions will replace the manually written functions which used for query DXIL operation information.
Reviewed By: bogner
Differential Revision: https://reviews.llvm.org/D125520
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911841f7 |
| 16-Jun-2022 |
Mitch Phillips <[email protected]> |
Revert "[TableGen][DirectX] generate DXIL operation table with TableGen."
This reverts commit 46fcdf23640ebb76271f91720583b0df6bed4481.
Reason: Broke the buildbots:
https://lab.llvm.org/buildbot/#/
Revert "[TableGen][DirectX] generate DXIL operation table with TableGen."
This reverts commit 46fcdf23640ebb76271f91720583b0df6bed4481.
Reason: Broke the buildbots:
https://lab.llvm.org/buildbot/#/builders/77/builds/18671
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46fcdf23 |
| 16-Jun-2022 |
Xiang Li <[email protected]> |
[TableGen][DirectX] generate DXIL operation table with TableGen.
Add more feature to tableGen backend gen-dxil-operation.
It will generate getOpCodeProperty, getOpCodeClassName and getOpCodeName wh
[TableGen][DirectX] generate DXIL operation table with TableGen.
Add more feature to tableGen backend gen-dxil-operation.
It will generate getOpCodeProperty, getOpCodeClassName and getOpCodeName when build DirectX target.
Each of these functions has a table which generate based on DXIL operations.
These generated functions will replace the manually written functions which used for query DXIL operation information.
Reviewed By: bogner
Differential Revision: https://reviews.llvm.org/D125520
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264c09b7 |
| 15-Jun-2022 |
Xiang Li <[email protected]> |
[TableGen][DirectX] Add tableGen backend to generate map from llvm intrinsic to DXIL operation.
A new tableGen backend gen-dxil-intrinsic-map is added to generate map from llvm intrinsic to DXIL ope
[TableGen][DirectX] Add tableGen backend to generate map from llvm intrinsic to DXIL operation.
A new tableGen backend gen-dxil-intrinsic-map is added to generate map from llvm intrinsic to DXIL operation.
A new file "DXILIntrinsicMap.inc" will be generated when build DirectX target which include the map.
The generated map will replace the manually created map when find DXIL operation from llvm intrinsic.
Reviewed By: bogner
Differential Revision: https://reviews.llvm.org/D125519
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Revision tags: llvmorg-14.0.5, llvmorg-14.0.4 |
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435897b4 |
| 11-May-2022 |
python3kgae <[email protected]> |
[TableGen][DirectX] Add tableGen backend to generate DXIL operation for DirectX backend.
A new tableGen backend gen-dxil-enum is added to generate enum for DXIL operation and operation class.
A new
[TableGen][DirectX] Add tableGen backend to generate DXIL operation for DirectX backend.
A new tableGen backend gen-dxil-enum is added to generate enum for DXIL operation and operation class.
A new file "DXILConstants.inc" will be generated when build DirectX target which include the enums.
More tableGen backends will be added to replace manually written table in DirectX backend.
The unused fields in dxil_inst will be used in future PR.
Reviewed By: bogner
Differential Revision: https://reviews.llvm.org/D125435
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85285be9 |
| 02-May-2022 |
Xiang Li <[email protected]> |
[DirectX backend] Add pass to lower llvm intrinsic into dxil op function.
A new pass DXILOpLowering was added.
It will scan all llvm intrinsics, create dxil op function if it can map to dxil op func
[DirectX backend] Add pass to lower llvm intrinsic into dxil op function.
A new pass DXILOpLowering was added.
It will scan all llvm intrinsics, create dxil op function if it can map to dxil op function.
Then translate call instructions on the intrinsic into call on dxil op function.
dxil op function will add i32 argument to the begining of args for dxil opcode.
So cannot use setCalledFunction to update the call instruction on intrinsic.
This commit only support sin to start the work.
Reviewed By: kuhar, beanz
Differential Revision: https://reviews.llvm.org/D124805
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