[RISCV][Clang] Add support for Zmmul extension

This patch implements recently ratified extension Zmmul, a subextension
of M (Integer Multiplication and Division) consisting only
multiplication part

[RISCV][Clang] Add support for Zmmul extension

This patch implements recently ratified extension Zmmul, a subextension
of M (Integer Multiplication and Division) consisting only
multiplication part of it.

Differential Revision: https://reviews.llvm.org/D103313
Reviewed By: craig.topper, jrtc27, asb

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[RISCV] Implement support for the Zicbop extension

Implements the ratified RISC-V Base Cache Management Operation ISA
Extension: Zicbop, as described in
https://github.com/riscv/riscv-CMOs/blob/mast

[RISCV] Implement support for the Zicbop extension

Implements the ratified RISC-V Base Cache Management Operation ISA
Extension: Zicbop, as described in
https://github.com/riscv/riscv-CMOs/blob/master/specifications/cmobase-v1.0.pdf.

This is implemented in a separate patch to Zicbom and Zicboz due to it
requiring a new ASM operand type to be defined.

Differential Revision: https://reviews.llvm.org/D117433

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[RISCV] Implement support for the Zicbom and Zicboz extensions

Implements the ratified RISC-V Base Cache Management Operation ISA
Extensions: Zicbom and Zicboz, as described in
https://github.com/ri

[RISCV] Implement support for the Zicbom and Zicboz extensions

Implements the ratified RISC-V Base Cache Management Operation ISA
Extensions: Zicbom and Zicboz, as described in
https://github.com/riscv/riscv-CMOs/blob/master/specifications/cmobase-v1.0.pdf.

Zicbop is implemented in a separate patch due to it requiring a new ASM
operand type to be defined.

As discussed in the relevant issue in the upstream spec
https://github.com/riscv/riscv-CMOs/issues/47, the cbo.* instructions
use the format (rs1) or 0(rs1) for their operand, similar to the AMOs.

Differential Revision: https://reviews.llvm.org/D117432

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[RISCV] Fix the problem of parsing long version numbers

For example, when parsing Zbpbo0p911, an error will be reported:
"multi-character extensions must be separated by underscores"

Reviewed By: a

[RISCV] Fix the problem of parsing long version numbers

For example, when parsing Zbpbo0p911, an error will be reported:
"multi-character extensions must be separated by underscores"

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D128644

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[RISCV] Add extra space into error message about unsupported extension version.

Differential Revision: https://reviews.llvm.org/D125491

[RISCV] 'K'-extension ordering

This commit adds 'K' to supported extension list (before 'J').
It makes "Zk*" extensions correctly placed before "Zv*" extensions.

Multi-letter "Z*" extensions are fi

[RISCV] 'K'-extension ordering

This commit adds 'K' to supported extension list (before 'J').
It makes "Zk*" extensions correctly placed before "Zv*" extensions.

Multi-letter "Z*" extensions are first ordered with the most closely
related alphabetical extension category ("IMAF..."). This is represented
in LLVM as `AllStdExts' variable in `llvm/lib/Support/RISCVISAInfo.cpp'.

However, it did not have 'k' making "Zk*" extensions not correctly ordered.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D124340

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[RISCV] Add +experimental-zvfh extension to cover half types in vectors.

Currently we allow half types in vectors if the scalar Zfh extension
is enabled. This behavior is not inline with the vector

[RISCV] Add +experimental-zvfh extension to cover half types in vectors.

Currently we allow half types in vectors if the scalar Zfh extension
is enabled. This behavior is not inline with the vector spec. For f32
and f64 types, the Zve32f, Zve64f, Zve64d, and V explicitly control
the availablity of floating point types in vectors.

In order to make our compiler compliant, we either need to remove all support
for half in vectors or we need an extension to control it.

Draft spec here https://github.com/riscv/riscv-v-spec/pull/780

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D121345

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[RISCV] Add combination crypto extensions in ISAInfo

The crypto extension have several shorthand extensions that don't consist of any extra instructions.
Take `zk` for example, while the extension w

[RISCV] Add combination crypto extensions in ISAInfo

The crypto extension have several shorthand extensions that don't consist of any extra instructions.
Take `zk` for example, while the extension would imply `zkn, zkr, zkt`. The 3 extensions should also
combine back into `zk` to maintain the canonical order in isa strings.

This patch addresses the above.

Reviewed By: VincentWu

Differential Revision: https://reviews.llvm.org/D119530

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[RISCV] add the MC layer support of Zfinx extension

This patch added the MC layer support of Zfinx extension.

Authored-by: StephenFan
Co-Authored-by: Shao-Ce Sun

Reviewed By: asb

Differential Rev

[RISCV] add the MC layer support of Zfinx extension

This patch added the MC layer support of Zfinx extension.

Authored-by: StephenFan
Co-Authored-by: Shao-Ce Sun

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D93298

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Revert "[RISCV] add the MC layer support of Zfinx extension"

This reverts commit 7798ecca9c3db42241169d31fea4fb820ed01830.

As reported in https://reviews.llvm.org/D93298#3331641 and
following, this

Revert "[RISCV] add the MC layer support of Zfinx extension"

This reverts commit 7798ecca9c3db42241169d31fea4fb820ed01830.

As reported in https://reviews.llvm.org/D93298#3331641 and
following, this causes assertion failures with inline assembly.

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[RISCV] add the MC layer support of Zfinx extension

This patch added the MC layer support of Zfinx extension.

Authored-by: StephenFan
Co-Authored-by: Shao-Ce Sun

Reviewed By: asb

Differential Rev

[RISCV] add the MC layer support of Zfinx extension

This patch added the MC layer support of Zfinx extension.

Authored-by: StephenFan
Co-Authored-by: Shao-Ce Sun

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D93298

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[RISCV] Recover the implication between Zve* extensions and the V extension.

This revision recover the implication between Zve* extensions and the V extension.

Differential Revision: https://review

[RISCV] Recover the implication between Zve* extensions and the V extension.

This revision recover the implication between Zve* extensions and the V extension.

Differential Revision: https://reviews.llvm.org/D119210

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[RISCV][NFC] Refactor RISCVISAInfo.

1. Remove computeDefaultABIFromArch and add computeDefaultABI in
RISCVISAInfo.
2. Add parseFeatureBits which may used in D118333.

Differential Revision: https://

[RISCV][NFC] Refactor RISCVISAInfo.

1. Remove computeDefaultABIFromArch and add computeDefaultABI in
RISCVISAInfo.
2. Add parseFeatureBits which may used in D118333.

Differential Revision: https://reviews.llvm.org/D119250

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[RISCV] Add support for Zihintpause extention

Add support for the 'pause' hint instruction as an alias for
'fence w, 0'. To do this allow the 'fence' operands pred and succ
to be set to 0 (the empty

[RISCV] Add support for Zihintpause extention

Add support for the 'pause' hint instruction as an alias for
'fence w, 0'. To do this allow the 'fence' operands pred and succ
to be set to 0 (the empty set). This will also allow future hints
to be encoded as 'fence 0, <x>' and 'fence <x>, 0'.

This patch revised from @mundaym's D93019.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D117789

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[RISCV] Don't make it an error have Zve* and V at the same time.

This should not be an error. V is a valid implementation of Zve.

Spec clarified here
https://github.com/riscv/riscv-v-spec/commit/9a

[RISCV] Don't make it an error have Zve* and V at the same time.

This should not be an error. V is a valid implementation of Zve.

Spec clarified here
https://github.com/riscv/riscv-v-spec/commit/9a877e8553362ff03a9b22b98e321b59aff50398

Differential Revision: https://reviews.llvm.org/D118679

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[RISCV] Adjust some comments.

[RISCV] Separate the Zfhmin and Zfh extensions.

The spec doesn't seem to be written as if Zfh implies Zfhmin. They
seem to be separate extensions.

This patch moves the instructions from Zfhmin to b

[RISCV] Separate the Zfhmin and Zfh extensions.

The spec doesn't seem to be written as if Zfh implies Zfhmin. They
seem to be separate extensions.

This patch moves the instructions from Zfhmin to be enabled with
either the Zfh or Zfhmin extensions.

Reviewed By: achieveartificialintelligence

Differential Revision: https://reviews.llvm.org/D118581

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[RISCV] Make Zfhmin in march imply F.

Zfhmin should imply F just like Zfh.

Reviewed By: achieveartificialintelligence

Differential Revision: https://reviews.llvm.org/D118578

[NFC][RISCV] Bundle up ISAInfo updates and checks

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D118334

[RISCV] Use std::map::count != 0 instead of std::map::count == 1. NFC

Maps always return 0 or 1 for count. Comparing to 0 can create
simpler compiled code.

Someday we'll get to use std::map::contai

[RISCV] Use std::map::count != 0 instead of std::map::count == 1. NFC

Maps always return 0 or 1 for count. Comparing to 0 can create
simpler compiled code.

Someday we'll get to use std::map::contains.

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[RISCV] Use const reference when looping over Exts in RISCVISAInfo.

Exts is a map of keyed by std::string with a extension info as
a value. Making copies of this wouldn't be cheap.

We had a mix of

[RISCV] Use const reference when looping over Exts in RISCVISAInfo.

Exts is a map of keyed by std::string with a extension info as
a value. Making copies of this wouldn't be cheap.

We had a mix of references and copies. This makes everything
consistently use a const reference to make it clear we aren't
modifying it.

Differential Revision: https://reviews.llvm.org/D118326

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[RISCV] Minor code cleanups in RISCVISAInfo. NFCI

Pass StringRef by value instead of const reference.

Replace if () llvm_unreachable with an assert.

Replace size() == 0 with empty()

[RISCV] add support for zbkx subextension in MC layer.

This patch adds support for zbkx extension from K extension(v1.0.0) in MC layer.
Instructions with same functionality and same encoding is defi

[RISCV] add support for zbkx subextension in MC layer.

This patch adds support for zbkx extension from K extension(v1.0.0) in MC layer.
Instructions with same functionality and same encoding is defined in the bitmanip extension.
It defines {Xperm8, Xperm4} as instruction aliases for xperm.* in Zbp extension. When Zbkx is enabled while Zbp is not, xperm.h will not be available. When Zbkx and Zbp are both enabled, the instructions will be decoded in Zbp format.

[[ https://reviews.llvm.org/D94999 | D94999 ]] this is the patch that introduces xperm.* instructions.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D117889

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[RISCV] Decouple Zve* extensions and the V extension.

According to the spec, there are some difference between V and Zve64d. For example, the vmulh integer multiply variants that return the high wor

[RISCV] Decouple Zve* extensions and the V extension.

According to the spec, there are some difference between V and Zve64d. For example, the vmulh integer multiply variants that return the high word of the product (vmulh.vv, vmulh.vx, vmulhu.vv, vmulhu.vx, vmulhsu.vv, vmulhsu.vx) are not included for EEW=64 in Zve64*, but V extension does support these instructions. So we should decouple Zve* extensions and the V extension.

Differential Revision: https://reviews.llvm.org/D117854

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[RISCV] Initially support the K-extension instructions on the LLVM MC layer

This commit is currently implementing supports for scalar cryptography extension for LLVM according to version v1.0.0 of [

[RISCV] Initially support the K-extension instructions on the LLVM MC layer

This commit is currently implementing supports for scalar cryptography extension for LLVM according to version v1.0.0 of [K Ext specification](https://github.com/riscv/riscv-crypto/releases)(scala crypto has been ratified already). Currently, we are implementing the MC (Machine Code) layer of his extension and the majority of work is done under `llvm/lib/Target/RISCV` directory. There are also some test files in `llvm/test/MC/RISCV` directory.

Remove the subfeature of Zbk* which conflict with b extensions to reduce the size of the patch.
(Zbk* will be resubmit after this patch has been merged)

**Co-author：**@ksyx & @VincentWu & @lihongliang & @achieveartificialintelligence

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D98136

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