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Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init |
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7ac78370 |
| 09-Jul-2022 |
Lang Hames <[email protected]> |
[JITLink][AArch64] Rename PointerToGOT and fix typo.
PointerToGOT lowering was accidentally changed from Delta32 to Delta64 in
db3722580335c. This patch moves it back to Delta32 and renames the gene
[JITLink][AArch64] Rename PointerToGOT and fix typo.
PointerToGOT lowering was accidentally changed from Delta32 to Delta64 in
db3722580335c. This patch moves it back to Delta32 and renames the generic
aarch64 edge to Delta32ToGOT to avoid the ambiguity.
No test case yet -- I haven't figured out how to write a succinct test case
(this typically appears in CIEs in eh-frames).
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30b6c51f |
| 06-Jul-2022 |
Sunho Kim <[email protected]> |
[ORC][ORC_RT][AArch64] Implement TLS descriptor in ELFNixPlatform.
Implements TLS descriptor relocations in JITLink ELF/AARCH64 backend and support the relevant runtime functions in ELFNixPlatform.
[ORC][ORC_RT][AArch64] Implement TLS descriptor in ELFNixPlatform.
Implements TLS descriptor relocations in JITLink ELF/AARCH64 backend and support the relevant runtime functions in ELFNixPlatform.
Unlike traditional TLS model, TLS descriptor model requires linker to return the "offset" from thread pointer via relocaiton not the actual pointer to thread local variable. There is no public libc api for adding new allocations to TLS block dynamically which thread pointer points to. So, we support this by taking delta from thread base pointer to the actual thread local variable in our allocated section.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D128601
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Revision tags: llvmorg-14.0.6 |
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398df667 |
| 14-Jun-2022 |
Sunho Kim <[email protected]> |
[JITLink][AArch64] Implement MoveWide16 generic edge.
Implements MoveWide16 generic edge kind that can be used to patch MOVZ/MOVK (imm16) instructions.
Reviewed By: lhames
Differential Revision: h
[JITLink][AArch64] Implement MoveWide16 generic edge.
Implements MoveWide16 generic edge kind that can be used to patch MOVZ/MOVK (imm16) instructions.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D127584
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6cc3450a |
| 14-Jun-2022 |
Sunho Kim <[email protected]> |
[JITLink][AArch64] Lift fixup functions from aarch64.cpp to aarch64.h. (NFC)
Lift fixup functions from aarch64.cpp to aarch64.h so that they have better chance of getting inlined. Also, adds some co
[JITLink][AArch64] Lift fixup functions from aarch64.cpp to aarch64.h. (NFC)
Lift fixup functions from aarch64.cpp to aarch64.h so that they have better chance of getting inlined. Also, adds some comments documenting the purpose of functions.
Reviewed By: sgraenitz
Differential Revision: https://reviews.llvm.org/D127559
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db372258 |
| 14-Jun-2022 |
Sunho Kim <[email protected]> |
[JITLink][AArch64] Unify table managers of ELF and MachO.
Unifies GOT/PLT table managers of ELF and MachO on aarch64 architecture. Additionally, it migrates table managers from PerGraphGOTAndPLTStub
[JITLink][AArch64] Unify table managers of ELF and MachO.
Unifies GOT/PLT table managers of ELF and MachO on aarch64 architecture. Additionally, it migrates table managers from PerGraphGOTAndPLTStubsBuilder to generic crtp TableManager.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D127558
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Revision tags: llvmorg-14.0.5 |
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51a41f23 |
| 09-Jun-2022 |
Sunho Kim <[email protected]> |
[JITLink][AArch64] Fix overflow range of Page21 fixup edge.
Allowed range for Page21 relocation is -2^32 <= X < 2^32 in both ELF and MachO.
https://github.com/llvm/llvm-project/blob/09c2b7c35af8c4b
[JITLink][AArch64] Fix overflow range of Page21 fixup edge.
Allowed range for Page21 relocation is -2^32 <= X < 2^32 in both ELF and MachO.
https://github.com/llvm/llvm-project/blob/09c2b7c35af8c4bad39f03e9f60df8bd07323028/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOAArch64.h#L210 (MachO)
ELF for the ARM ® 64-bit Architecture (AArch64) Table 4-9 (ELF)
Reviewed By: sgraenitz
Differential Revision: https://reviews.llvm.org/D126387
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9f299161 |
| 07-Jun-2022 |
Sunho Kim <[email protected]> |
[JITLink][AArch64] Refactor isLoadStoreImm12 check out of getPageOffset12Shift.
The separate isLoadStoreImm12 predicate will be used for validating ELF/aarch64
ldst relocation types.
Reviewed By: l
[JITLink][AArch64] Refactor isLoadStoreImm12 check out of getPageOffset12Shift.
The separate isLoadStoreImm12 predicate will be used for validating ELF/aarch64
ldst relocation types.
Reviewed By: lhames, sgraenitz
Differential Revision: https://reviews.llvm.org/D126628
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b6553f59 |
| 07-Jun-2022 |
Sunho Kim <[email protected]> |
[JITLink][ELF][AArch64] Lift MachO/arm64 edges into aarch64.h, reuse for ELF.
This patch moves the aarch64 fixup logic from the MachO/arm64 backend to
aarch64.h header so that it can be re-used in t
[JITLink][ELF][AArch64] Lift MachO/arm64 edges into aarch64.h, reuse for ELF.
This patch moves the aarch64 fixup logic from the MachO/arm64 backend to
aarch64.h header so that it can be re-used in the ELF/aarch64 backend. This
significantly expands relocation support in the ELF/aarch64 backend.
Reviewed By: lhames, sgraenitz
Differential Revision: https://reviews.llvm.org/D126286
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Revision tags: llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1, llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3 |
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| #
2ed91da0 |
| 03-Sep-2021 |
Stefan Gränitz <[email protected]> |
[JITLink] Add initial Aarch64 support
Set up basic infrastructure for 64-bit ARM architecture support in JITLink. It allows for loading a minimal object file and resolving a single relocation. Advan
[JITLink] Add initial Aarch64 support
Set up basic infrastructure for 64-bit ARM architecture support in JITLink. It allows for loading a minimal object file and resolving a single relocation. Advanced features like GOT and PLT handling or relaxations were intentionally left out for the moment.
This patch follows the idea to keep implementations for ARM (32-bit) and Aaarch64 (64-bit) separate, because:
* it might be easier to share code with the MachO "arm64" JITLink backend
* LLVM has individual targets for ARM and Aaarch64 as well
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D108986
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