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Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init |
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30b6c51f |
| 06-Jul-2022 |
Sunho Kim <[email protected]> |
[ORC][ORC_RT][AArch64] Implement TLS descriptor in ELFNixPlatform.
Implements TLS descriptor relocations in JITLink ELF/AARCH64 backend and support the relevant runtime functions in ELFNixPlatform.
[ORC][ORC_RT][AArch64] Implement TLS descriptor in ELFNixPlatform.
Implements TLS descriptor relocations in JITLink ELF/AARCH64 backend and support the relevant runtime functions in ELFNixPlatform.
Unlike traditional TLS model, TLS descriptor model requires linker to return the "offset" from thread pointer via relocaiton not the actual pointer to thread local variable. There is no public libc api for adding new allocations to TLS block dynamically which thread pointer points to. So, we support this by taking delta from thread base pointer to the actual thread local variable in our allocated section.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D128601
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Revision tags: llvmorg-14.0.6 |
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27fd01d3 |
| 22-Jun-2022 |
serge-sans-paille <[email protected]> |
[iwyu] Handle regressions in libLLVM header include
Running iwyu-diff on LLVM codebase since fb67d683db46dfd88da09d99 detected a few
regressions, fixing them.
The impact on preprocessed output is n
[iwyu] Handle regressions in libLLVM header include
Running iwyu-diff on LLVM codebase since fb67d683db46dfd88da09d99 detected a few
regressions, fixing them.
The impact on preprocessed output is negligible: -4k lines.
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9fc0aa45 |
| 15-Jun-2022 |
Sunho Kim <[email protected]> |
[JITLink][ELF] Log enum name of unsupported relocation type.
Logs enum name of unsupported relocation type. This also changes elf/x86 to use common util function (getELFRelocationTypeName) inside ll
[JITLink][ELF] Log enum name of unsupported relocation type.
Logs enum name of unsupported relocation type. This also changes elf/x86 to use common util function (getELFRelocationTypeName) inside llvm object module.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D127715
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3d8061a3 |
| 14-Jun-2022 |
Sunho Kim <[email protected]> |
[JITLink][ELF][AArch64] Implement R_AARCH64_MOVW_UABS_G*_NC.
Implements R_AARCH64_MOVW_UABS_G*_NC fixup edges. These relocation entries can be generated when code is compiled without a PIC flag. Wi
[JITLink][ELF][AArch64] Implement R_AARCH64_MOVW_UABS_G*_NC.
Implements R_AARCH64_MOVW_UABS_G*_NC fixup edges. These relocation entries can be generated when code is compiled without a PIC flag. With this patch, clang-repl can printf Hello World with ObjectLinkerLayer on aarch64 linux.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D127585
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db372258 |
| 14-Jun-2022 |
Sunho Kim <[email protected]> |
[JITLink][AArch64] Unify table managers of ELF and MachO.
Unifies GOT/PLT table managers of ELF and MachO on aarch64 architecture. Additionally, it migrates table managers from PerGraphGOTAndPLTStub
[JITLink][AArch64] Unify table managers of ELF and MachO.
Unifies GOT/PLT table managers of ELF and MachO on aarch64 architecture. Additionally, it migrates table managers from PerGraphGOTAndPLTStubsBuilder to generic crtp TableManager.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D127558
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f8a9536c |
| 10-Jun-2022 |
Sunho Kim <[email protected]> |
[JITLink][ELF][AArch64] Implement eh frame handling.
Implements eh frame handling by using generic EHFrame passes. The c++ exception handling works correctly with this change.
Reviewed By: lhames
[JITLink][ELF][AArch64] Implement eh frame handling.
Implements eh frame handling by using generic EHFrame passes. The c++ exception handling works correctly with this change.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D127063
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Revision tags: llvmorg-14.0.5 |
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| #
87c42683 |
| 10-Jun-2022 |
Sunho Kim <[email protected]> |
[JITLink][ELF][AArch64] Implement Procedure Linkage Table.
Implements Procedure Linkage Table (PLT) for ELF/AARCH64. The aarch64 linux calling convention also uses r16 as the intra-procedure-call sc
[JITLink][ELF][AArch64] Implement Procedure Linkage Table.
Implements Procedure Linkage Table (PLT) for ELF/AARCH64. The aarch64 linux calling convention also uses r16 as the intra-procedure-call scratch register same as MachO/ARM64. We can use the same stub sequence for this reason.
Also, BR regiseter doesn't touch X30 register. External function call by BL instruction (touched by CALL26 relocation) will set X30 to the original PC + 4, which is the intended behavior. External function call by B instruction (touched by JUMP26 relocation) doesn't requite to set X30, so the patch will be correct in this case too.
Reference: https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#611general-purpose-registers
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D127061
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| #
175f22d6 |
| 10-Jun-2022 |
Sunho Kim <[email protected]> |
[JITLink][ELF][AArch64] Implement R_AARCH64_JUMP26
Implements R_AARCH64_JUMP26. We can use the same generic aarch64 Branch26 edge since B instruction and BL nstruction have the same sized&offseted i
[JITLink][ELF][AArch64] Implement R_AARCH64_JUMP26
Implements R_AARCH64_JUMP26. We can use the same generic aarch64 Branch26 edge since B instruction and BL nstruction have the same sized&offseted immediate field, and the relocation address calculation is the same.
Reference: ELF for the ARM ® 64-bit Architecture Tabel 4-10, ARM Architecture Reference Manual ® ARMv8, for ARMv8-A architecture profile C6.2.24, C6.2.31
Reviewed By: sgraenitz
Differential Revision: https://reviews.llvm.org/D127059
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| #
5d5183b1 |
| 08-Jun-2022 |
Sunho Kim <[email protected]> |
[JITLink][ELF][AArch64] Implement R_AARCH64_PREL32 and R_AARCH64_PREL64.
This patch implements R_AARCH64_PREL64 and R_AARCH64_PREL32 relocations that is
used in eh frame pointers. The test case utli
[JITLink][ELF][AArch64] Implement R_AARCH64_PREL32 and R_AARCH64_PREL64.
This patch implements R_AARCH64_PREL64 and R_AARCH64_PREL32 relocations that is
used in eh frame pointers. The test case utlizes obj2yaml tool to create an
artifical eh frame that generates related relocation types.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D127058
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2094fad0 |
| 08-Jun-2022 |
Sunho Kim <[email protected]> |
[JITLink][ELF][AArch64] Implement ADR_GOT_PAGE, LD64_GOT_LO12_NC.
This patch implements two most commonly used Global Offset Table relocations in
ELF/AARCH64: R_AARCH64_ADR_GOT_PAGE and R_AARCH64_LD
[JITLink][ELF][AArch64] Implement ADR_GOT_PAGE, LD64_GOT_LO12_NC.
This patch implements two most commonly used Global Offset Table relocations in
ELF/AARCH64: R_AARCH64_ADR_GOT_PAGE and R_AARCH64_LD64_GOT_LO12_NC. It
implements the GOT table manager by extending the existing
PerGraphGOTAndPLTStubsBuilder. A future patch will unify this with the MachO
implementation to produce a generic aarch64 got table manager.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D127057
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| #
1deaa9b8 |
| 08-Jun-2022 |
Lang Hames <[email protected]> |
[JITLink][ELF][AArch64] Implement R_AARCH64_ABS64 relocation type.
Implement R_AARCH64_ABS64 relocation entry. This relocation type is generated
when creating a static function pointer to symbol.
R
[JITLink][ELF][AArch64] Implement R_AARCH64_ABS64 relocation type.
Implement R_AARCH64_ABS64 relocation entry. This relocation type is generated
when creating a static function pointer to symbol.
Reviewed By: lhames, sgraenitz
Differential Revision: https://reviews.llvm.org/D126658
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| #
ab472c96 |
| 08-Jun-2022 |
Sunho Kim <[email protected]> |
[JITLink][ELF][AArch64] Implement R_AARCH64_LDST*_ABS_LO12_NC relocation types.
Implement R_AARCH64_LDST*_ABS_LO12_NC relocaiton entries by reusing PageOffset21
generic relocation edge. The differen
[JITLink][ELF][AArch64] Implement R_AARCH64_LDST*_ABS_LO12_NC relocation types.
Implement R_AARCH64_LDST*_ABS_LO12_NC relocaiton entries by reusing PageOffset21
generic relocation edge. The difference between MachO backend is that in ELF,
the shift value is explicitly given by relocation type. lld generates the
relocation type that matches with instruction bitwidth, so getting the shift
value implicitly from instruction bytes should be fine in typical use cases.
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| #
25a9fb12 |
| 07-Jun-2022 |
Sunho Kim <[email protected]> |
[JITLink][ELF][AArch64] Implement ADR_PREL_PG_HI21, ADD_ABS_LO12_NC.
Implements R_AARCH64_ADR_PREL_PG_HI21 and R_AARCH64_ADD_ABS_LO12_NC fixup edges
using the generic aarch64 patch edges.
Reviewed
[JITLink][ELF][AArch64] Implement ADR_PREL_PG_HI21, ADD_ABS_LO12_NC.
Implements R_AARCH64_ADR_PREL_PG_HI21 and R_AARCH64_ADD_ABS_LO12_NC fixup edges
using the generic aarch64 patch edges.
Reviewed By: lhames, sgraenitz
Differential Revision: https://reviews.llvm.org/D126287
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b6553f59 |
| 07-Jun-2022 |
Sunho Kim <[email protected]> |
[JITLink][ELF][AArch64] Lift MachO/arm64 edges into aarch64.h, reuse for ELF.
This patch moves the aarch64 fixup logic from the MachO/arm64 backend to
aarch64.h header so that it can be re-used in t
[JITLink][ELF][AArch64] Lift MachO/arm64 edges into aarch64.h, reuse for ELF.
This patch moves the aarch64 fixup logic from the MachO/arm64 backend to
aarch64.h header so that it can be re-used in the ELF/aarch64 backend. This
significantly expands relocation support in the ELF/aarch64 backend.
Reviewed By: lhames, sgraenitz
Differential Revision: https://reviews.llvm.org/D126286
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Revision tags: llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init |
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| #
df597bf0 |
| 26-Jan-2022 |
dongAxis <[email protected]> |
[NFC][ORC][AArch64] use isInt<N> to replace fitsRangeSignedInt on aarch64
Summary:
This is the first path to support more relocation types on aarch64.
The patch just uses the isInt<N> to replace fi
[NFC][ORC][AArch64] use isInt<N> to replace fitsRangeSignedInt on aarch64
Summary:
This is the first path to support more relocation types on aarch64.
The patch just uses the isInt<N> to replace fitsRangeSignedInt.
Test Plan:
check-all
Differential Revision: https://reviews.llvm.org/D118231
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Revision tags: llvmorg-13.0.1, llvmorg-13.0.1-rc3 |
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| #
091e3648 |
| 18-Jan-2022 |
Steven Wu <[email protected]> |
[JITLink][ELF] Support duplicated section names from object file
ELF object files can contain duplicated sections (thus section symbols
as well), espeically when comdats/section groups are present.
[JITLink][ELF] Support duplicated section names from object file
ELF object files can contain duplicated sections (thus section symbols
as well), espeically when comdats/section groups are present. This patch
adds support for generating LinkGraph from object files that have
duplicated section names. This is the first step to properly model
comdats/section groups.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D114753
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Revision tags: llvmorg-13.0.1-rc2 |
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118e953b |
| 06-Jan-2022 |
Lang Hames <[email protected]> |
Re-apply "[JITLink] Update JITLink to use ExecutorAddr rather... " with fixes.
This re-applies 133f86e95492b2a00b944e070878424cfa73f87c, which was reverted in
c5965a411c635106a47738b8d2e24db822b7416
Re-apply "[JITLink] Update JITLink to use ExecutorAddr rather... " with fixes.
This re-applies 133f86e95492b2a00b944e070878424cfa73f87c, which was reverted in
c5965a411c635106a47738b8d2e24db822b7416f while I investigated bot failures.
The original failure contained an arithmetic conversion think-o (on line 419 of
EHFrameSupport.cpp) that could cause failures on 32-bit platforms. The issue
should be fixed in this patch.
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c5965a41 |
| 06-Jan-2022 |
Lang Hames <[email protected]> |
Revert "[JITLink] Update JITLink to use ExecutorAddr rather than..."
This reverts commit 133f86e95492b2a00b944e070878424cfa73f87c while I investigate
the bot failures at https://lab.llvm.org/buildbo
Revert "[JITLink] Update JITLink to use ExecutorAddr rather than..."
This reverts commit 133f86e95492b2a00b944e070878424cfa73f87c while I investigate
the bot failures at https://lab.llvm.org/buildbot#builders/186/builds/3370.
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133f86e9 |
| 05-Jan-2022 |
Lang Hames <[email protected]> |
[JITLink] Update JITLink to use ExecutorAddr rather than JITTargetAddress.
ExecutorAddr is the preferred representation for executor process addresses now.
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Revision tags: llvmorg-13.0.1-rc1 |
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cdb335ff |
| 25-Oct-2021 |
Stefan Gränitz <[email protected]> |
[JITLink] Fix warning 'shift count exceeds width' in AArch64 backend
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3 |
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96918515 |
| 13-Sep-2021 |
Stefan Gränitz <[email protected]> |
[JITLink] Factor out forEachRelocation() function from addRelocations() in ELF Aarch64 backend (NFC)
First step in reducing redundancy in `addRelocations()` implementations across ELF JITLink backen
[JITLink] Factor out forEachRelocation() function from addRelocations() in ELF Aarch64 backend (NFC)
First step in reducing redundancy in `addRelocations()` implementations across ELF JITLink backends. The patch factors out common logic for ELF relocation traversal into the new helper function `forEachRelocation()` in the `ELFLinkGraphBuilder` base class. For now, this is applied to the Aarch64 implementation. Others may follow soon.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D109516
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2ed91da0 |
| 03-Sep-2021 |
Stefan Gränitz <[email protected]> |
[JITLink] Add initial Aarch64 support
Set up basic infrastructure for 64-bit ARM architecture support in JITLink. It allows for loading a minimal object file and resolving a single relocation. Advan
[JITLink] Add initial Aarch64 support
Set up basic infrastructure for 64-bit ARM architecture support in JITLink. It allows for loading a minimal object file and resolving a single relocation. Advanced features like GOT and PLT handling or relaxations were intentionally left out for the moment.
This patch follows the idea to keep implementations for ARM (32-bit) and Aaarch64 (64-bit) separate, because:
* it might be easier to share code with the MachO "arm64" JITLink backend
* LLVM has individual targets for ARM and Aaarch64 as well
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D108986
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