Recommit: [lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo

The previous version of the patch did not update the definitions in
conditionally compiled code. This patch includ

Recommit: [lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo

The previous version of the patch did not update the definitions in
conditionally compiled code. This patch includes changes to ARC and
windows targets.

Original commit message was:

These were added to support some mips registers on linux, but linux mips
support has now been removed due.

They are still referenced in the freebds mips implementation, but the
completeness of that implementation is also unknown. All other
architectures just set these fields to zero, which is a cause of
significant bloat in our register info definitions.

Arm also has registers with variable sizes, but they were implemented in
a more gdb-compatible fashion and don't use this feature.

Differential Revision: https://reviews.llvm.org/D110914

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Revert "[lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo"

This reverts commit 00e704bf080ffeeb9e334fb3ab71594f9aa50969.

This commit should should have updated
llvm/llvm-pro

Revert "[lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo"

This reverts commit 00e704bf080ffeeb9e334fb3ab71594f9aa50969.

This commit should should have updated
llvm/llvm-project/lldb/source/Plugins/ABI/ARC/ABISysV_arc.cpp like the other
architectures.

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[lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo

These were added to support some mips registers on linux, but linux mips
support has now been removed due.

They are still r

[lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo

These were added to support some mips registers on linux, but linux mips
support has now been removed due.

They are still referenced in the freebds mips implementation, but the
completeness of that implementation is also unknown. All other
architectures just set these fields to zero, which is a cause of
significant bloat in our register info definitions.

Arm also has registers with variable sizes, but they were implemented in
a more gdb-compatible fashion and don't use this feature.

Differential Revision: https://reviews.llvm.org/D110914

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[lldb][NFC] Fix all formatting errors in .cpp file headers

Summary:
A *.cpp file header in LLDB (and in LLDB) should like this:
```
//===-- TestUtilities.cpp ----------------------------------------

[lldb][NFC] Fix all formatting errors in .cpp file headers

Summary:
A *.cpp file header in LLDB (and in LLDB) should like this:
```
//===-- TestUtilities.cpp -------------------------------------------------===//
```
However in LLDB most of our source files have arbitrary changes to this format and
these changes are spreading through LLDB as folks usually just use the existing
source files as templates for their new files (most notably the unnecessary
editor language indicator `-*- C++ -*-` is spreading and in every review
someone is pointing out that this is wrong, resulting in people pointing out that this
is done in the same way in other files).

This patch removes most of these inconsistencies including the editor language indicators,
all the different missing/additional '-' characters, files that center the file name, missing
trailing `===//` (mostly caused by clang-format breaking the line).

Reviewers: aprantl, espindola, jfb, shafik, JDevlieghere

Reviewed By: JDevlieghere

Subscribers: dexonsmith, wuzish, emaste, sdardis, nemanjai, kbarton, MaskRay, atanasyan, arphaman, jfb, abidh, jsji, JDevlieghere, usaxena95, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D73258

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[lldb] NFC modernize codebase with modernize-use-nullptr

Summary:
NFC = [[ https://llvm.org/docs/Lexicon.html#nfc | Non functional change ]]

This commit is the result of modernizing the LLDB codeba

[lldb] NFC modernize codebase with modernize-use-nullptr

Summary:
NFC = [[ https://llvm.org/docs/Lexicon.html#nfc | Non functional change ]]

This commit is the result of modernizing the LLDB codebase by using
`nullptr` instread of `0` or `NULL`. See
https://clang.llvm.org/extra/clang-tidy/checks/modernize-use-nullptr.html
for more information.

This is the command I ran and I to fix and format the code base:

```
run-clang-tidy.py \
-header-filter='.*' \
-checks='-*,modernize-use-nullptr' \
-fix ~/dev/llvm-project/lldb/.* \
-format \
-style LLVM \
-p ~/llvm-builds/debug-ninja-gcc
```

NOTE: There were also changes to `llvm/utils/unittest` but I did not
include them because I felt that maybe this library shall be updated in
isolation somehow.

NOTE: I know this is a rather large commit but it is a nobrainer in most
parts.

Reviewers: martong, espindola, shafik, #lldb, JDevlieghere

Reviewed By: JDevlieghere

Subscribers: arsenm, jvesely, nhaehnle, hiraditya, JDevlieghere, teemperor, rnkovacs, emaste, kubamracek, nemanjai, ki.stfu, javed.absar, arichardson, kbarton, jrtc27, MaskRay, atanasyan, dexonsmith, arphaman, jfb, jsji, jdoerfert, lldb-commits, llvm-commits

Tags: #lldb, #llvm

Differential Revision: https://reviews.llvm.org/D61847

llvm-svn: 361484

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[NFC] Remove ASCII lines from comments

A lot of comments in LLDB are surrounded by an ASCII line to delimit the
begging and end of the comment.

Its use is not really consistent across the code base

[NFC] Remove ASCII lines from comments

A lot of comments in LLDB are surrounded by an ASCII line to delimit the
begging and end of the comment.

Its use is not really consistent across the code base, sometimes the
lines are longer, sometimes they are shorter and sometimes they are
omitted. Furthermore, it looks kind of weird with the 80 column limit,
where the comment actually extends past the line, but not by much.
Furthermore, when /// is used for Doxygen comments, it looks
particularly odd. And when // is used, it incorrectly gives the
impression that it's actually a Doxygen comment.

I assume these lines were added to improve distinguishing between
comments and code. However, given that todays editors and IDEs do a
great job at highlighting comments, I think it's worth to drop this for
the sake of consistency. The alternative is fixing all the
inconsistencies, which would create a lot more churn.

Differential revision: https://reviews.llvm.org/D60508

llvm-svn: 358135

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Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the ne

Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636

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Process: fix FXSAVE on x86

The FXSAVE member `ftw` (FPU Tag Word) was given the wrong size (8-bit)
instead of the correct width (16-bit) as per the x87 Programmer's
Manual. Adjust this to ensure th

Process: fix FXSAVE on x86

The FXSAVE member `ftw` (FPU Tag Word) was given the wrong size (8-bit)
instead of the correct width (16-bit) as per the x87 Programmer's
Manual. Adjust this to ensure that we print out the complete value for
the register.

llvm-svn: 311579

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Remove an x86-ism from RegisterInfoInterface

Summary:
While adding FPR support to x86 elf core files (D26300), we ended up adding a
very x86-specific function to the general RegisterInfoInterface cl

Remove an x86-ism from RegisterInfoInterface

Summary:
While adding FPR support to x86 elf core files (D26300), we ended up adding a
very x86-specific function to the general RegisterInfoInterface class, which I
didn't catch in review. This removes that function. The only reason we needed
it was to find the offset of the FXSAVE area. This is the same as the offset of
the first register within that area, so we might as well use that.

Reviewers: clayborg, dvlahovski

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D27222

llvm-svn: 288236

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ELF core: Adding parsing of the floating-point and SSE registers on x86 32/64 bit elf core files

Summary:
The floating-point and SSE registers could be present in the elf-core
file in the note NT_FP

ELF core: Adding parsing of the floating-point and SSE registers on x86 32/64 bit elf core files

Summary:
The floating-point and SSE registers could be present in the elf-core
file in the note NT_FPREGSET for 64 bit ones, and in the note
NT_PRXFPREG for 32 bit ones.

The entire note is a binary blob matching the layout of the x87 save
area that gets generated by the FXSAVE instruction (see Intel developers
manual for more information).

This CL mainly modifies the RegisterRead function in
RegisterContextPOSIXCore_x86_64 for it to return the correct data both
for GPR and FPR/SSE registers, and return false (meaning "this register
is not available") for other registers.

I added a test to TestElfCore.py that tests reading FPR/SSE registers
both from a 32 and 64 bit elf-core file and I have inluded the source
which I used to generate the core files.

I tried to also add support for the AVX registers, because this info could
also be present in the elf-core file (note NT_X86_XSTATE - that is the result of
the newer XSAVE instruction). Parsing the contents from the file is
easy. The problem is that the ymm registers are split into two halves
and they are in different places in the note. For making this work one
would either make a "hacky" approach, because there won't be
any other way with the current state of the register contexts - they
assume that "this register is of size N and at offset M" and
don't have the notion of discontinuos registers.

Reviewers: labath

Subscribers: emaste, lldb-commits

Differential Revision: https://reviews.llvm.org/D26300

llvm-svn: 287506

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*** This commit represents a complete reformatting of the LLDB source code
*** to conform to clang-format’s LLVM style. This kind of mass change has
*** two obvious implications:

Firstly, merging t

*** This commit represents a complete reformatting of the LLDB source code
*** to conform to clang-format’s LLVM style. This kind of mass change has
*** two obvious implications:

Firstly, merging this particular commit into a downstream fork may be a huge
effort. Alternatively, it may be worth merging all changes up to this commit,
performing the same reformatting operation locally, and then discarding the
merge for this particular commit. The commands used to accomplish this
reformatting were as follows (with current working directory as the root of
the repository):

find . \( -iname "*.c" -or -iname "*.cpp" -or -iname "*.h" -or -iname "*.mm" \) -exec clang-format -i {} +
find . -iname "*.py" -exec autopep8 --in-place --aggressive --aggressive {} + ;

The version of clang-format used was 3.9.0, and autopep8 was 1.2.4.

Secondly, “blame” style tools will generally point to this commit instead of
a meaningful prior commit. There are alternatives available that will attempt
to look through this change and find the appropriate prior commit. YMMV.

llvm-svn: 280751

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Fix RegisterInfo initializers to have all the required initializers after recent changes. This quiets a few hundred warnings on MacOSX.

llvm-svn: 278060

X86: Change FTAG register size in FXSAVE structure

Summary:
- Changed from 16 bits to 8 bits for Intel Architecture
-- FXSAVE structure now conforms with the layout of FXSAVE
area specif

X86: Change FTAG register size in FXSAVE structure

Summary:
- Changed from 16 bits to 8 bits for Intel Architecture
-- FXSAVE structure now conforms with the layout of FXSAVE
area specified by IA Architecture Software Developer Manual

- Modified Linux and FreeBSD specific files to support this change
-- MacOSX already uses 8 bits for ftag register

- Modified TestRegisters.py and a.cpp:
-- Change allows 8 bit comparison of ftag values

-- Change resolves Bug 24733:
Removed XFAIL for Clang as the test works and passes for
Clang compiler as well

-- Change provides a Generic/Better way of testing Bug 24457
and Bug 25050 by using 'int3' inline assembly in inferior

Signed-off-by: Abhishek Aggarwal <[email protected]>

Reviewers: ovyalov, jingham, clayborg

Subscribers: tfiala, emaste

Differential Revision: http://reviews.llvm.org/D13587

llvm-svn: 250022

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Set orig_eax to -1 for Linux x86 platforms

Summary:
For Linux x86 based environments the orig_eax/orig_rax
register should be set to -1 to prevent the instruction pointer
to be decremented, which wa

Set orig_eax to -1 for Linux x86 platforms

Summary:
For Linux x86 based environments the orig_eax/orig_rax
register should be set to -1 to prevent the instruction pointer
to be decremented, which was the cause for the SIGILL exception.

Fix for Bug 23659

Reviewers: zturner, ashok.thirumurthi, mikesart, jingham, clayborg

Subscribers: clayborg, labath

Differential Revision: http://reviews.llvm.org/D11411

llvm-svn: 244875

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Same issue as in D8685 but for i386.

llvm-svn: 235454

Adding x86 to supported architectures on x86_64.

llvm-svn: 228715

Fixing TestRegisters on Linux with LLGS

This patch fixes TestRegisters on Linux with LLGS

Introduce GetUserRegisterCount on RegisterInfoInterface to distinguish
lldb internal registers (e.g.: DR0-D

Fixing TestRegisters on Linux with LLGS

This patch fixes TestRegisters on Linux with LLGS

Introduce GetUserRegisterCount on RegisterInfoInterface to distinguish
lldb internal registers (e.g.: DR0-DR7) during register counting.

Update GDBRemoteCommunicationServer to skip lldb internal registers on
read/write register and on discover register.

Submitted for Tamas Berghammer

llvm-svn: 226959

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Add lldb-gdbserver support for Linux x86_64.

This change brings in lldb-gdbserver (llgs) specifically for Linux x86_64.
(More architectures coming soon).

Not every debugserver option is covered yet

Add lldb-gdbserver support for Linux x86_64.

This change brings in lldb-gdbserver (llgs) specifically for Linux x86_64.
(More architectures coming soon).

Not every debugserver option is covered yet. Currently
the lldb-gdbserver command line can start unattached,
start attached to a pid (process-name attach not supported yet),
or accept lldb attaching and launching a process or connecting
by process id.

The history of this large change can be found here:
https://github.com/tfiala/lldb/tree/dev-tfiala-native-protocol-linux-x86_64

Until mid/late April, I was not sharing the work and continued
to rebase it off of head (developed via id [email protected]). I switched over to
user [email protected] in the middle, and once I went to github, I did
merges rather than rebasing so I could share with others.

llvm-svn: 212069

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Renamed a struct from i386 to i386_.
It is to avoid build error when gcc defines i386.

llvm-svn: 204628

Switch over to use the ArchSpec::GetMachine() instead of ArchSpec::GetCore() to keep the code more portable as we add new core types to ArchSpec.

llvm-svn: 204400

Moved various RegisterContext files from Process/POSIX to Process/Utility for easier sharing.

Fix Windows build by adding JITLoaderGDB and ProcessElfCore.
RegisterContext: fixes for Windows build: s

Moved various RegisterContext files from Process/POSIX to Process/Utility for easier sharing.

Fix Windows build by adding JITLoaderGDB and ProcessElfCore.
RegisterContext: fixes for Windows build: sizeof(GPR::register) didn't work, switched to sizeof(((GPR*)NULL)->register).

llvm-svn: 203667

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