|
Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init |
|
| #
35efe1d8 |
| 06-Jul-2022 |
Vladislav Khmelevsky <[email protected]> |
[BOLT][AArch64] Handle gold linker veneers
The gold linker veneers are written between functions without symbols, so we to handle it specially in BOLT.
Vladislav Khmelevsky, Advanced Software Techn
[BOLT][AArch64] Handle gold linker veneers
The gold linker veneers are written between functions without symbols, so we to handle it specially in BOLT.
Vladislav Khmelevsky, Advanced Software Technology Lab, Huawei
Differential Revision: https://reviews.llvm.org/D129260
show more ...
|
| #
66b01a89 |
| 30-Jun-2022 |
Amir Ayupov <[email protected]> |
[BOLT] Fix getDynoStats to handle BCs with no functions
Address fuzzer crash
Reviewed By: yota9
Differential Revision: https://reviews.llvm.org/D120696
|
| #
fc2d96c3 |
| 29-Jun-2022 |
Rafael Auler <[email protected]> |
Revert "[BOLT][AArch64] Handle gold linker veneers"
This reverts commit 425dda76e9fac93117289fd68a2abdfb1e4a0ba5.
This commit is currently causing BOLT to crash in one of our binaries and needs a b
Revert "[BOLT][AArch64] Handle gold linker veneers"
This reverts commit 425dda76e9fac93117289fd68a2abdfb1e4a0ba5.
This commit is currently causing BOLT to crash in one of our binaries and needs a bit more checking to make sure it is safe to land.
show more ...
|
|
Revision tags: llvmorg-14.0.6 |
|
| #
425dda76 |
| 15-Jun-2022 |
Vladislav Khmelevsky <[email protected]> |
[BOLT][AArch64] Handle gold linker veneers
The gold linker veneers are written between functions without symbols, so we to handle it specially in BOLT.
Vladislav Khmelevsky, Advanced Software Techn
[BOLT][AArch64] Handle gold linker veneers
The gold linker veneers are written between functions without symbols, so we to handle it specially in BOLT.
Vladislav Khmelevsky, Advanced Software Technology Lab, Huawei
Differential Revision: https://reviews.llvm.org/D128082
show more ...
|
|
Revision tags: llvmorg-14.0.5 |
|
| #
b92436ef |
| 05-Jun-2022 |
Fangrui Song <[email protected]> |
[bolt] Remove unneeded cl::ZeroOrMore for cl::opt options
|
| #
36c7d79d |
| 04-Jun-2022 |
Fangrui Song <[email protected]> |
Remove unneeded cl::ZeroOrMore for cl::opt options
Similar to 557efc9a8b68628c2c944678c6471dac30ed9e8e. This commit handles options where cl::ZeroOrMore is more than one line below cl::opt.
|
| #
5904836b |
| 03-Jun-2022 |
spupyrev <[email protected]> |
[BOLT] Cache-Aware Tail Duplication
A new "cache-aware" strategy for tail duplication.
Differential Revision: https://reviews.llvm.org/D123050
|
|
Revision tags: llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1 |
|
| #
687e4af1 |
| 08-Feb-2022 |
Amir Ayupov <[email protected]> |
[BOLT] CMOVConversion pass
Convert simple hammocks into cmov based on misprediction rate.
Test Plan: - Assembly test: `cmov-conversion.s` - Testing on a binary: # Bootstrap clang with `-x86-cmov-
[BOLT] CMOVConversion pass
Convert simple hammocks into cmov based on misprediction rate.
Test Plan: - Assembly test: `cmov-conversion.s` - Testing on a binary: # Bootstrap clang with `-x86-cmov-converter-force-all` and `-Wl,--emit-relocs` (Release build) # Collect perf.data:
- `clang++ <opts> bolt/lib/Core/BinaryFunction.cpp -E > bf.cpp` - `perf record -e cycles:u -j any,u -- clang-15 bf.cpp -O2 -std=c++14 -c -o bf.o` # Optimize clang-15 with and w/o -cmov-conversion: - `llvm-bolt clang-15 -p perf.data -o clang-15.bolt` - `llvm-bolt clang-15 -p perf.data -cmov-conversion -o clang-15.bolt.cmovconv` # Run perf experiment: - test: `clang-15.bolt.cmovconv`, - control: `clang-15.bolt`, - workload (clang options): `bf.cpp -O2 -std=c++14 -c -o bf.o` Results: ``` task-clock [delta: -360.21 ± 356.75, delta(%): -1.7760 ± 1.7589, p-value: 0.047951, balance: -6] instructions [delta: 44061118 ± 13246382, delta(%): 0.0690 ± 0.0207, p-value: 0.000001, balance: 50] icache-misses [delta: -5534468 ± 2779620, delta(%): -0.4331 ± 0.2175, p-value: 0.028014, balance: -28] branch-misses [delta: -1624270 ± 1113244, delta(%): -0.3456 ± 0.2368, p-value: 0.030300, balance: -22] ```
Reviewed By: rafauler
Differential Revision: https://reviews.llvm.org/D120177
show more ...
|
|
Revision tags: llvmorg-15-init |
|
| #
194b164e |
| 01-Feb-2022 |
Amir Ayupov <[email protected]> |
[BOLT][NFC] Fix compiler warnings
Summary: - variable 'TotalSize' set but not used - variable 'TotalCallsTopN' set but not used - use of bitwise '|' with boolean operands
Reviewed By: maksfb
FBD33
[BOLT][NFC] Fix compiler warnings
Summary: - variable 'TotalSize' set but not used - variable 'TotalCallsTopN' set but not used - use of bitwise '|' with boolean operands
Reviewed By: maksfb
FBD33911129
show more ...
|
|
Revision tags: llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2 |
|
| #
330c8e42 |
| 07-Jan-2022 |
Maksim Panchenko <[email protected]> |
[BOLT][NFC] Refactor command line options in BinaryPassManager
Summary: Reformat code and put options in lexicographical order.
Comparing to clang-format output, manual formatting looks cleaner to
[BOLT][NFC] Refactor command line options in BinaryPassManager
Summary: Reformat code and put options in lexicographical order.
Comparing to clang-format output, manual formatting looks cleaner to me.
(cherry picked from FBD33481692)
show more ...
|
| #
ee0e9ccb |
| 23-Dec-2021 |
Maksim Panchenko <[email protected]> |
[BOLTRewrite][NFC] Fix braces usages
Summary: Refactor bolt/*/Rewrite to follow the braces rule for if/else/loop from LLVM Coding Standards.
(cherry picked from FBD33305364)
|
| #
2f09f445 |
| 21-Dec-2021 |
Maksim Panchenko <[email protected]> |
[BOLT][NFC] Fix file-description comments
Summary: Fix comments at the start of source files.
(cherry picked from FBD33274597)
|
| #
ccb99dd1 |
| 19-Dec-2021 |
Maksim Panchenko <[email protected]> |
[BOLT] Fix profile and tests for nop-removal pass
Summary: Since nops are now removed in a separate pass, the profile is consumed on a CFG with nops. If previously a profile was generated without no
[BOLT] Fix profile and tests for nop-removal pass
Summary: Since nops are now removed in a separate pass, the profile is consumed on a CFG with nops. If previously a profile was generated without nops, the offsets in the profile could be different if branches included nops either as a source or a destination.
This diff adjust offsets to make the profile reading backwards compatible.
(cherry picked from FBD33231254)
show more ...
|
| #
08f56926 |
| 19-Dec-2021 |
Vladislav Khmelevsky <[email protected]> |
[BOLT] Move disassemble optimizations to optimization passes
Summary: The patch moves the shortenInstructions and nop remove to separate binary passes. As a result when llvm-bolt optimizations stage
[BOLT] Move disassemble optimizations to optimization passes
Summary: The patch moves the shortenInstructions and nop remove to separate binary passes. As a result when llvm-bolt optimizations stage will begin the instructions of the binary functions will be absolutely the same as it was in the binary. This is needed for the golang support by llvm-bolt. Some of the tests must be changed, since bb alignment nops might create unreachable BBs in original functions.
Vladislav Khmelevsky, Advanced Software Technology Lab, Huawei
(cherry picked from FBD32896517)
show more ...
|
| #
40c2e0fa |
| 15-Dec-2021 |
Maksim Panchenko <[email protected]> |
[BOLT][NFC] Reformat with clang-format
Summary: Selectively apply clang-format to BOLT code base.
(cherry picked from FBD33119052)
|
| #
cbf530bf |
| 01-Dec-2021 |
Maksim Panchenko <[email protected]> |
[BOLT] Add pass to normalize CFG
Summary: Some optimizations may remove all instructions in a basic block.
The pass will cleanup the CFG afterwards by removing empty basic blocks and merging duplic
[BOLT] Add pass to normalize CFG
Summary: Some optimizations may remove all instructions in a basic block.
The pass will cleanup the CFG afterwards by removing empty basic blocks and merging duplicate CFG edges.
The normalized CFG is printed under '-print-normalized' option.
(cherry picked from FBD32774360)
show more ...
|
|
Revision tags: llvmorg-13.0.1-rc1 |
|
| #
443f1b4f |
| 27-Sep-2021 |
Rafael Auler <[email protected]> |
Rebase: [BOLT] AsmDump: dump function assembly and profile info
Summary: Added new functionality of dumping simple functions into assembly. This includes: - function control flow (basic blocks, inst
Rebase: [BOLT] AsmDump: dump function assembly and profile info
Summary: Added new functionality of dumping simple functions into assembly. This includes: - function control flow (basic blocks, instructions), - profile information as `FDATA` directives, to be consumed by link_fdata, - data labels, - CFI directives, - symbols for callee functions, - jump table symbols.
Envisioned usage: 1. Find a function that triggers BOLT crash (e.g. with `bughunter.sh`). 2. Generate reproducer asm source for that function (using `-funcs`). 3. Attach it to an issue. 4. Reduce and include as a test case.
Current limitations: 1. Emitted assembly won't match input file relocations. 2. No DWARF support. 3. Data is not emitted.
(cherry picked from FBD32746857)
show more ...
|
| #
a34c753f |
| 08-Oct-2021 |
Rafael Auler <[email protected]> |
Rebase: [NFC] Refactor sources to be buildable in shared mode
Summary: Moves source files into separate components, and make explicit component dependency on each other, so LLVM build system knows h
Rebase: [NFC] Refactor sources to be buildable in shared mode
Summary: Moves source files into separate components, and make explicit component dependency on each other, so LLVM build system knows how to build BOLT in BUILD_SHARED_LIBS=ON.
Please use the -c merge.renamelimit=230 git option when rebasing your work on top of this change.
To achieve this, we create a new library to hold core IR files (most classes beginning with Binary in their names), a new library to hold Utils, some command line options shared across both RewriteInstance and core IR files, a new library called Rewrite to hold most classes concerned with running top-level functions coordinating the binary rewriting process, and a new library called Profile to hold classes dealing with profile reading and writing.
To remove the dependency from BinaryContext into X86-specific classes, we do some refactoring on the BinaryContext constructor to receive a reference to the specific backend directly from RewriteInstance. Then, the dependency on X86 or AArch64-specific classes is transfered to the Rewrite library. We can't have the Core library depend on targets because targets depend on Core (which would create a cycle).
Files implementing the entry point of a tool are transferred to the tools/ folder. All header files are transferred to the include/ folder. The src/ folder was renamed to lib/.
(cherry picked from FBD32746834)
show more ...
|