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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1 |
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79554aaa |
| 08-Aug-2022 |
Zhang Rui <[email protected]> |
tools/power/x86/intel-speed-select: Introduce TPMI interface support
TPMI (Topology Aware Register and PM Capsule Interface) creates a
flexible, extendable and software-PCIe-driver-enumerable MMIO i
tools/power/x86/intel-speed-select: Introduce TPMI interface support
TPMI (Topology Aware Register and PM Capsule Interface) creates a
flexible, extendable and software-PCIe-driver-enumerable MMIO interface
for PM features.
SST feature is exposed via the TPMI interface on newer Xeon platforms.
Kernel TPMI based SST driver provides a series of new IOCTLs for userspace
to use.
Introduce support for the platforms that do SST control via TPMI interface.
Compared with previous platforms, Newer Xeons also supports multi-punit in a
package/die, including cpu punit and non-cpu punit. These have already
been handled in the generic code.
Signed-off-by: Zhang Rui <[email protected]>
[[email protected]: changelog edits]
Signed-off-by: Srinivas Pandruvada <[email protected]>
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d0d1a603 |
| 20-Aug-2022 |
Zhang Rui <[email protected]> |
tools/power/x86/intel-speed-select: Introduce isst-core-mbox.c
isst-core.c should contain generic core APIs only.
Platform specific implementations/configurations should be removed from
this file.
tools/power/x86/intel-speed-select: Introduce isst-core-mbox.c
isst-core.c should contain generic core APIs only.
Platform specific implementations/configurations should be removed from
this file.
Introduce isst-core-mbox.c and move all mbox/mmio specific functions to
this file.
Introduce struct isst_platform_ops which contains a series of callbacks
that used by the core APIs but need platform specific implementation.
No functional changes are expected.
Signed-off-by: Zhang Rui <[email protected]>
[[email protected]: changelog edits]
Signed-off-by: Srinivas Pandruvada <[email protected]>
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Revision tags: v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1 |
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7d440da0 |
| 19-Jan-2022 |
Srinivas Pandruvada <[email protected]> |
tools/power/x86/intel-speed-select: HFI support
Read HFI (Hardware Feedback Interface) events to process config level
changes in oob mode. When HFI is supported there is no need for polling
to check
tools/power/x86/intel-speed-select: HFI support
Read HFI (Hardware Feedback Interface) events to process config level
changes in oob mode. When HFI is supported there is no need for polling
to check config level change.
Subscribe to Linux thermal netlink messages and process message:
THERMAL_GENL_EVENT_CPU_CAPABILITY_CHANGE.
This message contains cpu number, performance and energy efficiency.
Signed-off-by: Srinivas Pandruvada <[email protected]>
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7fd786df |
| 18-Jan-2022 |
Srinivas Pandruvada <[email protected]> |
tools/power/x86/intel-speed-select: OOB daemon mode
It is possible that some out of band agent changed config level. In this
case CPUs need to be online/offline to support this config change. Add
a
tools/power/x86/intel-speed-select: OOB daemon mode
It is possible that some out of band agent changed config level. In this
case CPUs need to be online/offline to support this config change. Add
a command line option --oob, so that this tool can run as daemon and poll
for config level change and take action. The poll interval is configurable
in seconds using config option --poll-interval.
Signed-off-by: Srinivas Pandruvada <[email protected]>
show more ...
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Revision tags: v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2, v5.6-rc1, v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3, v5.3-rc2, v5.3-rc1, v5.2 |
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| #
3fb4f7cd |
| 30-Jun-2019 |
Srinivas Pandruvada <[email protected]> |
tools/power/x86: A tool to validate Intel Speed Select commands
The Intel(R) Speed select technologies contains four features.
Performance profile:An non architectural mechanism that allows multipl
tools/power/x86: A tool to validate Intel Speed Select commands
The Intel(R) Speed select technologies contains four features.
Performance profile:An non architectural mechanism that allows multiple
optimized performance profiles per system via static and/or dynamic
adjustment of core count, workload, Tjmax, and TDP, etc. aka ISS
in the documentation.
Base Frequency: Enables users to increase guaranteed base frequency on
certain cores (high priority cores) in exchange for lower base frequency
on remaining cores (low priority cores). aka PBF in the documenation.
Turbo frequency: Enables the ability to set different turbo ratio limits
to cores based on priority. aka FACT in the documentation.
Core power: An Interface that allows user to define per core/tile
priority.
There is a multi level help for commands and options. This can be used
to check required arguments for each feature and commands for the
feature.
To start navigating the features start with
$sudo intel-speed-select --help
For help on a specific feature for example
$sudo intel-speed-select perf-profile --help
To get help for a command for a feature for example
$sudo intel-speed-select perf-profile get-lock-status --help
Signed-off-by: Srinivas Pandruvada <[email protected]>
Acked-by: Len Brown <[email protected]>
Acked-by: Rafael J. Wysocki <[email protected]>
Signed-off-by: Andy Shevchenko <[email protected]>
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