| 91b75129 | 21-Feb-2025 |
Mario Limonciello <[email protected]> |
ASoC: SOF: amd: Move depends on AMD_NODE to consumers
CONFIG_SND_SOC_SOF_AMD_COMMON is a hidden option that is only selected by
other options. It can't have a direct depends on AMD_NODE because sel
ASoC: SOF: amd: Move depends on AMD_NODE to consumers
CONFIG_SND_SOC_SOF_AMD_COMMON is a hidden option that is only selected by
other options. It can't have a direct depends on AMD_NODE because select
can't pick another option automatically.
This was attempted to be fixed in commit b47834ee4485b ("ASoC: SOF: amd:
Add depends on CPU_SUP_AMD") but this just masked the issue as it was found
in another config.
Instead move the `depends on AMD_NODE` out of SND_SOC_SOF_AMD_COMMON to
all the consumers and drop `depends on CPU_SUP_AMD`.
Fixes: b47834ee4485b ("ASoC: SOF: amd: Add depends on CPU_SUP_AMD")
Fixes: f120cf33d232 ("ASoC: SOF: amd: Use AMD_NODE")
Reported-by: kernel test robot <[email protected]>
Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/
Signed-off-by: Mario Limonciello <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Mark Brown <[email protected]>
show more ...
|
| ccc8480d | 07-Feb-2025 |
Cristian Ciocaltea <[email protected]> |
ASoC: SOF: amd: Add branch prediction hint in ACP IRQ handler
The conditional involving sdev->first_boot in acp_sof_ipc_irq_thread()
will succeed only once, i.e. during the very first run of the
DSP
ASoC: SOF: amd: Add branch prediction hint in ACP IRQ handler
The conditional involving sdev->first_boot in acp_sof_ipc_irq_thread()
will succeed only once, i.e. during the very first run of the
DSP firmware.
Use the unlikely() annotation to help improve branch prediction
accuracy.
Signed-off-by: Cristian Ciocaltea <[email protected]>
Reviewed-by: Venkata Prasad Potturu <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Mark Brown <[email protected]>
show more ...
|
| ac84ca81 | 07-Feb-2025 |
Cristian Ciocaltea <[email protected]> |
ASoC: SOF: amd: Handle IPC replies before FW_BOOT_COMPLETE
In some cases, e.g. during resuming from suspend, there is a possibility
that some IPC reply messages get received by the host while the DS
ASoC: SOF: amd: Handle IPC replies before FW_BOOT_COMPLETE
In some cases, e.g. during resuming from suspend, there is a possibility
that some IPC reply messages get received by the host while the DSP
firmware has not yet reached the complete boot state.
Detect when this happens and do not attempt to process the unexpected
replies from DSP. Instead, provide proper debugging support.
Signed-off-by: Cristian Ciocaltea <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Mark Brown <[email protected]>
show more ...
|
| 494ddacd | 08-Oct-2024 |
Venkata Prasad Potturu <[email protected]> |
ASoC: SOF: amd: Fix for ACP SRAM addr for acp7.0 platform
Incorrect SRAM base addr for acp7.0 platform results firmware boot
failure.
Add condition check to support SRAM addr for various platforms.
ASoC: SOF: amd: Fix for ACP SRAM addr for acp7.0 platform
Incorrect SRAM base addr for acp7.0 platform results firmware boot
failure.
Add condition check to support SRAM addr for various platforms.
Fixes: 145d7e5ae8f4 ("ASoC: SOF: amd: add option to use sram for data bin loading")
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Mark Brown <[email protected]>
show more ...
|
| a42db293 | 16-Aug-2024 |
Vijendar Mukunda <[email protected]> |
ASoC: SOF: amd: Fix for acp init sequence
When ACP is not powered on by default, acp power on sequence explicitly
invoked by programming pgfsm control mask. The existing implementation
checks the sa
ASoC: SOF: amd: Fix for acp init sequence
When ACP is not powered on by default, acp power on sequence explicitly
invoked by programming pgfsm control mask. The existing implementation
checks the same PGFSM status mask and programs the same PGFSM control mask
in all ACP variants which breaks acp power on sequence for ACP6.0 and
ACP6.3 variants. So to fix this issue, update ACP pgfsm control mask and
status mask based on acp descriptor rev field, which will vary based on
acp variant.
Fixes: 846aef1d7cc0 ("ASoC: SOF: amd: Add Renoir ACP HW support")
Signed-off-by: Vijendar Mukunda <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Mark Brown <[email protected]>
show more ...
|
| 897e91e9 | 13-Aug-2024 |
Vijendar Mukunda <[email protected]> |
ASoC: SOF: amd: Fix for incorrect acp error register offsets
Addition of 'dsp_intr_base' to ACP error register offsets points to
wrong register offsets in irq handler. Correct the acp error register
ASoC: SOF: amd: Fix for incorrect acp error register offsets
Addition of 'dsp_intr_base' to ACP error register offsets points to
wrong register offsets in irq handler. Correct the acp error register
offsets. ACP error status register offset and acp error reason register
offset got changed from ACP6.0 onwards. Add 'acp_error_stat' and
'acp_sw0_i2s_err_reason' as descriptor fields in sof_amd_acp_desc
structure and update the values based on the ACP variant.
>From Rembrandt platform onwards, errors related to SW1 Soundwire manager
instance/I2S controller connected on P1 power tile is reported with
ACP_SW1_I2S_ERROR_REASON register. Add conditional check for the same.
Fixes: 96eb81851012 ("ASoC: SOF: amd: add interrupt handling for SoundWire manager devices")
Signed-off-by: Vijendar Mukunda <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Mark Brown <[email protected]>
show more ...
|