| 7e756671 | 21-Oct-2024 |
Emil Renner Berthing <[email protected]> |
riscv: dts: thead: Add TH1520 ethernet nodes
Add gmac, mdio, and phy nodes to enable the gigabit Ethernet ports on
the BeagleV Ahead and Sipeed Lichee Pi 4a boards.
Signed-off-by: Emil Renner Berth
riscv: dts: thead: Add TH1520 ethernet nodes
Add gmac, mdio, and phy nodes to enable the gigabit Ethernet ports on
the BeagleV Ahead and Sipeed Lichee Pi 4a boards.
Signed-off-by: Emil Renner Berthing <[email protected]>
[drew: change apb registers from syscon to second reg of gmac node,
add phy reset delay properties for beaglev ahead]
Signed-off-by: Drew Fustini <[email protected]>
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| 5ec423d1 | 14-Oct-2024 |
Emil Renner Berthing <[email protected]> |
riscv: dts: thead: Add TH1520 GPIO ranges
Add gpio-ranges properties to the TH1520 device tree, so user space can
change basic pinconf settings for GPIOs and are not allowed to use pads
already used
riscv: dts: thead: Add TH1520 GPIO ranges
Add gpio-ranges properties to the TH1520 device tree, so user space can
change basic pinconf settings for GPIOs and are not allowed to use pads
already used by other functions.
Adjust number of GPIOs available for the different controllers.
Acked-by: Linus Walleij <[email protected]>
Tested-by: Thomas Bonnefille <[email protected]>
Signed-off-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Drew Fustini <[email protected]>
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| 7f5b2821 | 01-Aug-2024 |
Drew Fustini <[email protected]> |
riscv: dts: thead: add clock to TH1520 gpio nodes
Add clock property to TH1520 gpio controller nodes. These clock gates
refer to corresponding enable bits in the peripheral clock gate control
regist
riscv: dts: thead: add clock to TH1520 gpio nodes
Add clock property to TH1520 gpio controller nodes. These clock gates
refer to corresponding enable bits in the peripheral clock gate control
register. Refer to register PERI_CLK_CFG in section 4.4.2.2.52 of the
TH1520 System User Manual.
Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
Signed-off-by: Drew Fustini <[email protected]>
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| e919fe03 | 01-Aug-2024 |
Drew Fustini <[email protected]> |
riscv: dts: thead: Add TH1520 AP_SUBSYS clock controller
Add node for the AP_SUBSYS clock controller on the T-Head TH1520 SoC.
Link: https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/d
riscv: dts: thead: Add TH1520 AP_SUBSYS clock controller
Add node for the AP_SUBSYS clock controller on the T-Head TH1520 SoC.
Link: https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf
Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
Signed-off-by: Drew Fustini <[email protected]>
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|