| bfef0760 | 29-Sep-2023 |
Lad Prabhakar <[email protected]> |
riscv: dts: renesas: rzfive-smarc: Enable the blocks which were explicitly disabled
Now that noncoherent dma support for the RZ/Five SoC has been added, enable the IP blocks which were disabled on t
riscv: dts: renesas: rzfive-smarc: Enable the blocks which were explicitly disabled
Now that noncoherent dma support for the RZ/Five SoC has been added, enable the IP blocks which were disabled on the RZ/Five SMARC. This adds support for the below peripherals: * Ethernet * DMAC * SDHI * USB * RSPI * SSI
Signed-off-by: Lad Prabhakar <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
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| c68b12a9 | 02-Jan-2023 |
Lad Prabhakar <[email protected]> |
riscv: dts: renesas: rzfive-smarc-som: Enable OSTM nodes
Enable OSTM{1,2} nodes on RZ/Five SMARC SoM.
Note, OSTM{1,2} nodes are enabled in the RZ/G2UL SMARC SoM DTSI [0] hence deleting the disabled
riscv: dts: renesas: rzfive-smarc-som: Enable OSTM nodes
Enable OSTM{1,2} nodes on RZ/Five SMARC SoM.
Note, OSTM{1,2} nodes are enabled in the RZ/G2UL SMARC SoM DTSI [0] hence deleting the disabled nodes from RZ/Five SMARC SoM DTSI enables it here too as we include [0] in RZ/Five SMARC SoM DTSI.
[0] arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
Signed-off-by: Lad Prabhakar <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
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| 40005cb6 | 15-Nov-2022 |
Lad Prabhakar <[email protected]> |
riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C
Enable CANFD and I2C on RZ/Five SMARC EVK.
Note, these blocks are enabled in RZ/G2UL SMARC EVK DTSI [0] hence deleting these disabled nodes from
riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C
Enable CANFD and I2C on RZ/Five SMARC EVK.
Note, these blocks are enabled in RZ/G2UL SMARC EVK DTSI [0] hence deleting these disabled nodes from RZ/Five SMARC EVK DTSI enables them here too as we include [0] in RZ/Five SMARC EVK DTSI.
[0] arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi
Signed-off-by: Lad Prabhakar <[email protected]> Acked-by: Conor Dooley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
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| 42d3345e | 15-Nov-2022 |
Lad Prabhakar <[email protected]> |
riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable ADC/OPP/Thermal Zones/TSU
Enable support for below blocks found on RZ/Five SMARC EVK SoC/SoM: - ADC - OPP - Thermal Zones - TSU
Note, these
riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable ADC/OPP/Thermal Zones/TSU
Enable support for below blocks found on RZ/Five SMARC EVK SoC/SoM: - ADC - OPP - Thermal Zones - TSU
Note, these blocks are enabled in RZ/G2UL SMARC SoM DTSI [0] hence deleting these disabled nodes from RZ/Five SMARC SoM DTSI enables them here too as we include [0] in RZ/Five SMARC SoM DTSI.
[0] arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
Signed-off-by: Lad Prabhakar <[email protected]> Acked-by: Conor Dooley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
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