MIPS: migrate to generic rule for built-in DTBs

Commit 654102df2ac2 ("kbuild: add generic support for built-in boot
DTBs") introduced generic support for built-in DTBs.

Select GENERIC_BUILTIN_DTB a

MIPS: migrate to generic rule for built-in DTBs

Commit 654102df2ac2 ("kbuild: add generic support for built-in boot
DTBs") introduced generic support for built-in DTBs.

Select GENERIC_BUILTIN_DTB and BUILTIN_DTB_ALL when the built-in DTB
support is enabled.

DTBs compiled under arch/mips/boot/dts/ will be wrapped by the generic
rule in scripts/Makefile.vmlinux.

Signed-off-by: Masahiro Yamada <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>

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MIPS: mscc: Add serval support

Add a device trees and FIT image support for the Microsemi Serval SoC
which belongs to same family of the Ocelot SoC.

It is based on the work of Lars Povlsen <lars.po

MIPS: mscc: Add serval support

Add a device trees and FIT image support for the Microsemi Serval SoC
which belongs to same family of the Ocelot SoC.

It is based on the work of Lars Povlsen <[email protected]>.

Signed-off-by: Gregory CLEMENT <[email protected]>
Acked-by: Alexandre Belloni <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>

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MIPS: mscc: Add jaguar2 support

Add a device trees and FIT image support for the Microsemi Jaguar2 SoC
which belongs to same family of the Ocelot SoC.

It is based on the work of Lars Povlsen <lars.

MIPS: mscc: Add jaguar2 support

Add a device trees and FIT image support for the Microsemi Jaguar2 SoC
which belongs to same family of the Ocelot SoC.

It is based on the work of Lars Povlsen <[email protected]>.

Signed-off-by: Gregory CLEMENT <[email protected]>
Acked-by: Alexandre Belloni <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>

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MIPS: mscc: Add luton PC0B91 device tree

Add a device tree for the Microsemi Luton PCB091 evaluation board.

It is based on the work of Lars Povlsen <[email protected]>.

Signed-off-by: Gre

MIPS: mscc: Add luton PC0B91 device tree

Add a device tree for the Microsemi Luton PCB091 evaluation board.

It is based on the work of Lars Povlsen <[email protected]>.

Signed-off-by: Gregory CLEMENT <[email protected]>
Acked-by: Alexandre Belloni <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>

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MIPS: mscc: Prepare configuration to handle more SoCs

Ocelot belongs to a family of SoC named the VCore III. In order to add
these new Soc, use the new symbol SOC_VCOREIII instead of a one
dedicated

MIPS: mscc: Prepare configuration to handle more SoCs

Ocelot belongs to a family of SoC named the VCore III. In order to add
these new Soc, use the new symbol SOC_VCOREIII instead of a one
dedicated to Ocelot.

In order to avoid regression on driver building, the MSCC_OCELOT
configuration symbol is kept until the driver will be converted.

Signed-off-by: Gregory CLEMENT <[email protected]>
Acked-by: Alexandre Belloni <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>

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treewide: Add SPDX license identifier - Makefile/Kconfig

Add SPDX license identifiers to all Make/Kconfig files which:

- Have no license information of any form

These files fall under the project

treewide: Add SPDX license identifier - Makefile/Kconfig

Add SPDX license identifiers to all Make/Kconfig files which:

- Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

GPL-2.0-only

Signed-off-by: Thomas Gleixner <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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MIPS: mscc: add DT for Ocelot PCB120

The Ocelot PCB120 evaluation board is different from the PCB123 in that
it has 4 external VSC8584 (or VSC8574) PHYs.

It uses the SoC's second MDIO bus for exter

MIPS: mscc: add DT for Ocelot PCB120

The Ocelot PCB120 evaluation board is different from the PCB123 in that
it has 4 external VSC8584 (or VSC8574) PHYs.

It uses the SoC's second MDIO bus for external PHYs which have a
reversed address on the bus (i.e. PHY4 is on address 3, PHY5 is on
address 2, PHY6 on 1 and PHY7 on 0).

Here is how the PHYs are connected to the switch ports:
port 0: phy0 (internal)
port 1: phy1 (internal)
port 2: phy2 (internal)
port 3: phy3 (internal)
port 4: phy7
port 5: phy4
port 6: phy6
port 9: phy5

Reviewed-by: Alexandre Belloni <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
Signed-off-by: Paul Burton <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/20869/
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]

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mips: mscc: build FIT image for Ocelot

Ocelot now has a u-boot port, allow building FIT images instead of relying
on the legacy detection and builtin DTB.

Signed-off-by: Alexandre Belloni <alexandr

mips: mscc: build FIT image for Ocelot

Ocelot now has a u-boot port, allow building FIT images instead of relying
on the legacy detection and builtin DTB.

Signed-off-by: Alexandre Belloni <[email protected]>
Reviewed-by: James Hogan <[email protected]>
Signed-off-by: Paul Burton <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/19632/
Cc: Ralf Baechle <[email protected]>
Cc: [email protected]
Cc: [email protected]

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MIPS: dts: Avoid unneeded built-in.a in DTS dirs

arch/mips/boot/dts/Makefile collects objects from sub-directories into
built-in.a only when CONFIG_BUILTIN_DTB is enabled. Reflect it also to
the sub

MIPS: dts: Avoid unneeded built-in.a in DTS dirs

arch/mips/boot/dts/Makefile collects objects from sub-directories into
built-in.a only when CONFIG_BUILTIN_DTB is enabled. Reflect it also to
the sub-directory Makefiles. This suppresses unneeded built-in.a
creation in arch/mips/boot/dts/*/ directories.

While I am here, I replaced $(patsubst %.dtb, %.dtb.o, $(dtb-y)) with
$(addsuffix .o, $(dtb-y)) to simplify the code a little bit.

Signed-off-by: Masahiro Yamada <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: Paul Cercueil <[email protected]>
Cc: Mathieu Malaterre <[email protected]>
Cc: Alexandre Belloni <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/19099/
Signed-off-by: James Hogan <[email protected]>

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MIPS: mscc: Add ocelot PCB123 device tree

Add a device tree for the Microsemi Ocelot PCB123 evaluation board.

Signed-off-by: Alexandre Belloni <[email protected]>
Cc: Ralf Baechle <ralf

MIPS: mscc: Add ocelot PCB123 device tree

Add a device tree for the Microsemi Ocelot PCB123 evaluation board.

Signed-off-by: Alexandre Belloni <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Allan Nielsen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/18856/
Signed-off-by: James Hogan <[email protected]>

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MIPS: mscc: Add ocelot dtsi

Add a device tree include file for the Microsemi Ocelot SoC.

Signed-off-by: Alexandre Belloni <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc:

MIPS: mscc: Add ocelot dtsi

Add a device tree include file for the Microsemi Ocelot SoC.

Signed-off-by: Alexandre Belloni <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Allan Nielsen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/18855/
Signed-off-by: James Hogan <[email protected]>

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