|
Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2 |
|
| #
99adc529 |
| 04-Feb-2025 |
Michal Simek <[email protected]> |
arm64: versal-net: Add description for b2197-00 revA board
Add description for VN-X board. The board is using Versal NET SoC which has
16 a78 cores with additional IPs.
Signed-off-by: Michal Simek
arm64: versal-net: Add description for b2197-00 revA board
Add description for VN-X board. The board is using Versal NET SoC which has
16 a78 cores with additional IPs.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/1b23d64107220f5b48fc77ba28c5e59a20d83600.1738657826.git.michal.simek@amd.com
show more ...
|
|
Revision tags: v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4, v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2 |
|
| #
23b697ec |
| 11-Sep-2023 |
Rob Herring <[email protected]> |
arm64: dts: xilinx: Apply overlays to base dtbs
DT overlays in tree need to be applied to a base DTB to validate they
apply, to run schema checks on them, and to catch any errors at compile
time. De
arm64: dts: xilinx: Apply overlays to base dtbs
DT overlays in tree need to be applied to a base DTB to validate they
apply, to run schema checks on them, and to catch any errors at compile
time. Defining the "-dtbs" variable is not enough as the combined DT must
be added to dtbs-y.
zynqmp-sck-kr-g-revA.dtso and zynqmp-sck-kr-g-revB.dtso don't exist, so drop
them.
Signed-off-by: Rob Herring <[email protected]>
Fixes: 45fe0dc4ea2e ("arm64: xilinx: Use zynqmp prefix for SOM dt overlays")
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
show more ...
|
|
Revision tags: v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1 |
|
| #
45fe0dc4 |
| 02-May-2023 |
Michal Simek <[email protected]> |
arm64: xilinx: Use zynqmp prefix for SOM dt overlays
U-Boot is using zynqmp- prefix to compose DT name for board detection
that's why also generate DT in this format in the kernel.
Signed-off-by: M
arm64: xilinx: Use zynqmp prefix for SOM dt overlays
U-Boot is using zynqmp- prefix to compose DT name for board detection
that's why also generate DT in this format in the kernel.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/49c1b8c992929610ba17b9c6edf5d40d4b28d2ed.1683033163.git.michal.simek@amd.com
show more ...
|
| #
370b0e90 |
| 03-May-2023 |
Michal Simek <[email protected]> |
arm64: zynqmp: Change zc1275 board name to zcu1275
Internal board zc1275 was released also to public which ends up with adding
missing 'u' to board name. Reflect this change by renaming DT files.
S
arm64: zynqmp: Change zc1275 board name to zcu1275
Internal board zc1275 was released also to public which ends up with adding
missing 'u' to board name. Reflect this change by renaming DT files.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/9b50c72c4e634b2c72758eed6275920eedbda06f.1683099606.git.michal.simek@amd.com
show more ...
|
|
Revision tags: v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3 |
|
| #
7a4c31ee |
| 22-Sep-2021 |
Michal Simek <[email protected]> |
arm64: zynqmp: Add support for Xilinx Kria SOM board
There are couple of revisions of SOMs (k26) and associated carrier cards
(kv260).
SOM itself has two major versions:
sm-k26 - SOM with EMMC
smk-k
arm64: zynqmp: Add support for Xilinx Kria SOM board
There are couple of revisions of SOMs (k26) and associated carrier cards
(kv260).
SOM itself has two major versions:
sm-k26 - SOM with EMMC
smk-k26 - SOM without EMMC used on starter kit with preprogrammed firmware
in QSPI.
SOMs are describing only devices available on the SOM or connections which
are described in specification (for example UART, fwuen).
When SOM boots out of QSPI it uses limited number of peripherals defined by
the specification and present in sm(k)-k26 dtses.
Then a carrier card (CC) detection is happening and DT overlay is applied
to brings new functionality. That's why DT overlays are used. The name is
composed together with SOM name and CC name that's why DT overlays with
these names are generated to make sure they can be used together.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/1ba32590670434b650bacf6410a65579dd30b38b.1632294439.git.michal.simek@xilinx.com
show more ...
|
|
Revision tags: v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7 |
|
| #
e6a52b9e |
| 14-Jun-2021 |
Michal Simek <[email protected]> |
arm64: zynqmp: Add support for zcu102-rev1.1 board
zcu102 rev1.1 compare to rev1.0 is using by default different DDR memory
which requires different configuration. The reason for adding this file to
arm64: zynqmp: Add support for zcu102-rev1.1 board
zcu102 rev1.1 compare to rev1.0 is using by default different DDR memory
which requires different configuration. The reason for adding this file to
Linux kernel is that U-Boot fdtfile variable is composed based on board
revision (in eeprom) and dtb file should exist in standard distibutions for
passing it to Linux kernel.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/38bbbeb885f4d9ba466c43ab9b4d25190a3552fb.1623684253.git.michal.simek@xilinx.com
show more ...
|
|
Revision tags: v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5 |
|
| #
127b856f |
| 21-Jan-2021 |
Michal Simek <[email protected]> |
arm64: dts: zynqmp: Add description for zcu104 revC
Xilinx ZynqMP zcu104 revC and newer board revisions have different i2c
structure compare to revA. The rest of the board is the same from software
arm64: dts: zynqmp: Add description for zcu104 revC
Xilinx ZynqMP zcu104 revC and newer board revisions have different i2c
structure compare to revA. The rest of the board is the same from software
perspective.
Also enable DMAs and QSPI.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/17f68c235ea1ce96c3293ca0cf3178951d6663f7.1611224800.git.michal.simek@xilinx.com
show more ...
|
|
Revision tags: v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2, v5.6-rc1, v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3, v5.3-rc2, v5.3-rc1, v5.2, v5.2-rc7, v5.2-rc6, v5.2-rc5, v5.2-rc4, v5.2-rc3, v5.2-rc2, v5.2-rc1, v5.1, v5.1-rc7, v5.1-rc6, v5.1-rc5, v5.1-rc4, v5.1-rc3, v5.1-rc2, v5.1-rc1, v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6, v5.0-rc5, v5.0-rc4, v5.0-rc3, v5.0-rc2, v5.0-rc1, v4.20, v4.20-rc7, v4.20-rc6, v4.20-rc5, v4.20-rc4, v4.20-rc3, v4.20-rc2, v4.20-rc1, v4.19, v4.19-rc8, v4.19-rc7, v4.19-rc6, v4.19-rc5, v4.19-rc4, v4.19-rc3, v4.19-rc2, v4.19-rc1, v4.18, v4.18-rc8, v4.18-rc7, v4.18-rc6, v4.18-rc5, v4.18-rc4, v4.18-rc3, v4.18-rc2, v4.18-rc1, v4.17, v4.17-rc7, v4.17-rc6, v4.17-rc5, v4.17-rc4 |
|
| #
41ee3e38 |
| 02-May-2018 |
Michal Simek <[email protected]> |
arm64: dts: zynqmp: Add support for Avnet Ultra96 rev1 board
Avnet Ultra96 rev1 board is commercialized Xilinx zcu100 revC/D
internal board. The patch is reusing zcu100 revC files but changing
model
arm64: dts: zynqmp: Add support for Avnet Ultra96 rev1 board
Avnet Ultra96 rev1 board is commercialized Xilinx zcu100 revC/D
internal board. The patch is reusing zcu100 revC files but changing
model description and compatible strings which are used for example by
libmraa.
Signed-off-by: Michal Simek <[email protected]>
show more ...
|
|
Revision tags: v4.17-rc3, v4.17-rc2, v4.17-rc1, v4.16, v4.16-rc7, v4.16-rc6, v4.16-rc5, v4.16-rc4 |
|
| #
d7247786 |
| 02-Mar-2018 |
Michal Simek <[email protected]> |
arm64: dts: zynqmp: Remove ep108 board
ZynqMP Emulation board is no longer tested and there is no reason to
keep maintaining it.
Signed-off-by: Michal Simek <[email protected]>
|
|
Revision tags: v4.16-rc3, v4.16-rc2, v4.16-rc1, v4.15, v4.15-rc9 |
|
| #
e2fc49e1 |
| 19-Jan-2018 |
Michal Simek <[email protected]> |
arm64: zynqmp: Add support for Xilinx zc1751
Xilinx zc1751 boards is used for silicon validation. Board can be
extended with 5 FMCs/DCs cards to connect various IPs. Describe all
these combinations.
arm64: zynqmp: Add support for Xilinx zc1751
Xilinx zc1751 boards is used for silicon validation. Board can be
extended with 5 FMCs/DCs cards to connect various IPs. Describe all
these combinations.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
show more ...
|
| #
d665c743 |
| 19-Jan-2018 |
Michal Simek <[email protected]> |
arm64: zynqmp: Add support for Xilinx zc12XX boards
These 3 boards requires minimal support to get Linux up and running.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Rob Herri
arm64: zynqmp: Add support for Xilinx zc12XX boards
These 3 boards requires minimal support to get Linux up and running.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
show more ...
|
| #
b8aee022 |
| 19-Jan-2018 |
Michal Simek <[email protected]> |
arm64: zynqmp: Add support for Xilinx zcu111-revA
Xilinx zcu111 is a customer board. It is reusing some parts from zcu102.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Rob Her
arm64: zynqmp: Add support for Xilinx zcu111-revA
Xilinx zcu111 is a customer board. It is reusing some parts from zcu102.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
show more ...
|
| #
9243d4d3 |
| 18-Jan-2018 |
Michal Simek <[email protected]> |
arm64: zynqmp: Add support for Xilinx zcu106-revA
Xilinx zcu106 is a customer board. It is reusing some parts from zcu102.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Rob Her
arm64: zynqmp: Add support for Xilinx zcu106-revA
Xilinx zcu106 is a customer board. It is reusing some parts from zcu102.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
show more ...
|
| #
612eac3b |
| 18-Jan-2018 |
Michal Simek <[email protected]> |
arm64: zynqmp: Add support for Xilinx zcu104-revA
Xilinx zcu104 is another customer board. It is sort of zcu102 clone
with some differences.
Signed-off-by: Michal Simek <[email protected]>
Re
arm64: zynqmp: Add support for Xilinx zcu104-revA
Xilinx zcu104 is another customer board. It is sort of zcu102 clone
with some differences.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
show more ...
|
| #
ef797b53 |
| 18-Jan-2018 |
Michal Simek <[email protected]> |
arm64: zynqmp: Add support for Xilinx zcu102
This patch is adding revA, revB and rev1.0. There are also other
revisions between which should be backward compatible with previous
versions. Unfortunat
arm64: zynqmp: Add support for Xilinx zcu102
This patch is adding revA, revB and rev1.0. There are also other
revisions between which should be backward compatible with previous
versions. Unfortunately all revs are still in use.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
show more ...
|
|
Revision tags: v4.15-rc8, v4.15-rc7, v4.15-rc6, v4.15-rc5, v4.15-rc4, v4.15-rc3, v4.15-rc2, v4.15-rc1, v4.14, v4.14-rc8, v4.14-rc7, v4.14-rc6, v4.14-rc5, v4.14-rc4, v4.14-rc3, v4.14-rc2, v4.14-rc1, v4.13, v4.13-rc7, v4.13-rc6, v4.13-rc5, v4.13-rc4, v4.13-rc3, v4.13-rc2, v4.13-rc1, v4.12, v4.12-rc7, v4.12-rc6, v4.12-rc5, v4.12-rc4, v4.12-rc3, v4.12-rc2, v4.12-rc1, v4.11, v4.11-rc8, v4.11-rc7, v4.11-rc6, v4.11-rc5, v4.11-rc4, v4.11-rc3, v4.11-rc2, v4.11-rc1, v4.10, v4.10-rc8, v4.10-rc7, v4.10-rc6, v4.10-rc5, v4.10-rc4, v4.10-rc3, v4.10-rc2, v4.10-rc1, v4.9, v4.9-rc8, v4.9-rc7, v4.9-rc6, v4.9-rc5, v4.9-rc4, v4.9-rc3, v4.9-rc2, v4.9-rc1, v4.8, v4.8-rc8, v4.8-rc7, v4.8-rc6, v4.8-rc5, v4.8-rc4, v4.8-rc3, v4.8-rc2, v4.8-rc1, v4.7, v4.7-rc7, v4.7-rc6, v4.7-rc5, v4.7-rc4, v4.7-rc3, v4.7-rc2, v4.7-rc1, v4.6, v4.6-rc7, v4.6-rc6, v4.6-rc5, v4.6-rc4, v4.6-rc3, v4.6-rc2, v4.6-rc1, v4.5, v4.5-rc7, v4.5-rc6, v4.5-rc5, v4.5-rc4, v4.5-rc3, v4.5-rc2, v4.5-rc1, v4.4 |
|
| #
5869ba06 |
| 07-Jan-2016 |
Michal Simek <[email protected]> |
arm64: zynqmp: Add support for Xilinx zcu100-revC
This board has 2GB of memory, i2c, sd, wifi sdio, spis, uarts, display
port and usbs.
Board is using fixed clocks because clock driver hasn't been m
arm64: zynqmp: Add support for Xilinx zcu100-revC
This board has 2GB of memory, i2c, sd, wifi sdio, spis, uarts, display
port and usbs.
Board is using fixed clocks because clock driver hasn't been merged yet.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
show more ...
|
| #
b9c74682 |
| 17-Jan-2018 |
Michal Simek <[email protected]> |
arm64: zynqmp: Add SPDX license identifier
Add SPDX identifier as was done by for example by:
"License cleanup: add SPDX GPL-2.0 license identifier to files with no
license" (commit <b24413180f5600b
arm64: zynqmp: Add SPDX license identifier
Add SPDX identifier as was done by for example by:
"License cleanup: add SPDX GPL-2.0 license identifier to files with no
license" (commit <b24413180f5600bcb3bb70fbed5cf186b60864bd>)
Signed-off-by: Michal Simek <[email protected]>
show more ...
|
| #
7e7962dd |
| 05-Nov-2017 |
Masahiro Yamada <[email protected]> |
kbuild: handle dtb-y and CONFIG_OF_ALL_DTBS natively in Makefile.lib
If CONFIG_OF_ALL_DTBS is enabled, "make ARCH=arm64 dtbs" compiles each
DTB twice; one from arch/arm64/boot/dts/*/Makefile and the
kbuild: handle dtb-y and CONFIG_OF_ALL_DTBS natively in Makefile.lib
If CONFIG_OF_ALL_DTBS is enabled, "make ARCH=arm64 dtbs" compiles each
DTB twice; one from arch/arm64/boot/dts/*/Makefile and the other from
the dtb-$(CONFIG_OF_ALL_DTBS) line in arch/arm64/boot/dts/Makefile.
It could be a race problem when building DTBS in parallel.
Another minor issue is CONFIG_OF_ALL_DTBS covers only *.dts in vendor
sub-directories, so this broke when Broadcom added one more hierarchy
in arch/arm64/boot/dts/broadcom/<soc>/.
One idea to fix the issues in a clean way is to move DTB handling
to Kbuild core scripts. Makefile.dtbinst already recognizes dtb-y
natively, so it should not hurt to do so.
Add $(dtb-y) to extra-y, and $(dtb-) as well if CONFIG_OF_ALL_DTBS is
enabled. All clutter things in Makefiles go away.
As a bonus clean-up, I also removed dts-dirs. Just use subdir-y
directly to traverse sub-directories.
Signed-off-by: Masahiro Yamada <[email protected]>
Acked-by: Arnd Bergmann <[email protected]>
[robh: corrected BUILTIN_DTB to CONFIG_BUILTIN_DTB]
Signed-off-by: Rob Herring <[email protected]>
show more ...
|
| #
74ce1896 |
| 02-Nov-2017 |
Masahiro Yamada <[email protected]> |
kbuild: clean up *.dtb and *.dtb.S patterns from top-level Makefile
We need to add "clean-files" in Makfiles to clean up DT blobs, but we
often miss to do so.
Since there are no source files that e
kbuild: clean up *.dtb and *.dtb.S patterns from top-level Makefile
We need to add "clean-files" in Makfiles to clean up DT blobs, but we
often miss to do so.
Since there are no source files that end with .dtb or .dtb.S, so we
can clean-up those files from the top-level Makefile.
Signed-off-by: Masahiro Yamada <[email protected]>
Acked-by: Arnd Bergmann <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
show more ...
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Revision tags: v4.4-rc8, v4.4-rc7, v4.4-rc6, v4.4-rc5, v4.4-rc4, v4.4-rc3, v4.4-rc2, v4.4-rc1, v4.3, v4.3-rc7, v4.3-rc6, v4.3-rc5, v4.3-rc4, v4.3-rc3, v4.3-rc2, v4.3-rc1, v4.2, v4.2-rc8, v4.2-rc7, v4.2-rc6, v4.2-rc5, v4.2-rc4, v4.2-rc3, v4.2-rc2, v4.2-rc1, v4.1, v4.1-rc8, v4.1-rc7, v4.1-rc6, v4.1-rc5, v4.1-rc4, v4.1-rc3, v4.1-rc2, v4.1-rc1, v4.0, v4.0-rc7, v4.0-rc6, v4.0-rc5, v4.0-rc4 |
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5d1b79d2 |
| 09-Mar-2015 |
Michal Simek <[email protected]> |
ARM64: Add new Xilinx ZynqMP SoC
Initial version of device tree for Xilinx ZynqMP SoC.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Sören Brinkmann <[email protected]>
S
ARM64: Add new Xilinx ZynqMP SoC
Initial version of device tree for Xilinx ZynqMP SoC.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Sören Brinkmann <[email protected]>
Signed-off-by: Arnd Bergmann <[email protected]>
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