| 58fcd0b7 | 07-Mar-2025 |
Rob Herring (Arm) <[email protected]> |
arm64: dts: amd/seattle: Drop undocumented "spi-controller" properties
"spi-controller" is not a documented property nor used anywhere, so drop it.
Signed-off-by: Rob Herring (Arm) <[email protected]
arm64: dts: amd/seattle: Drop undocumented "spi-controller" properties
"spi-controller" is not a documented property nor used anywhere, so drop it.
Signed-off-by: Rob Herring (Arm) <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
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| 6268ac36 | 07-Mar-2025 |
Rob Herring (Arm) <[email protected]> |
arm64: dts: amd/seattle: Fix bus, mmc, and ethernet node names
Use preferred node names for bus, mmc, and ethernet.
Signed-off-by: Rob Herring (Arm) <[email protected]> Reviewed-by: Krzysztof Kozlows
arm64: dts: amd/seattle: Fix bus, mmc, and ethernet node names
Use preferred node names for bus, mmc, and ethernet.
Signed-off-by: Rob Herring (Arm) <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
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| 8945ed5c | 07-Mar-2025 |
Rob Herring (Arm) <[email protected]> |
arm64: dts: amd/seattle: Move and simplify fixed clocks
The fixed clocks are not part of "simple-bus", so move them out of the bus to the top-level. In the process, use the preferred node names of "
arm64: dts: amd/seattle: Move and simplify fixed clocks
The fixed clocks are not part of "simple-bus", so move them out of the bus to the top-level. In the process, use the preferred node names of "clock-<freq>". There's also little reason to have multiple fixed clocks at the same frequencies, so remove them keeping the labels to minimize the change.
Signed-off-by: Rob Herring (Arm) <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
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| 6a2f0b2d | 03-Dec-2019 |
Ard Biesheuvel <[email protected]> |
dt: amd-seattle: add a description of the CPUs and caches
Add a DT description of the CPU and cache hierarchy as found on the AMD Seattle SOC. Given the tight coupling of the PMU with the CPUs, move
dt: amd-seattle: add a description of the CPUs and caches
Add a DT description of the CPU and cache hierarchy as found on the AMD Seattle SOC. Given the tight coupling of the PMU with the CPUs, move the PMU node into the cpu .dtsi file as well, and add the missing affinity description.
Signed-off-by: Ard Biesheuvel <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]>
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| 429863e7 | 03-Dec-2019 |
Ard Biesheuvel <[email protected]> |
dt: amd-seattle: add description of the SATA/CCP SMMUs
Add descriptions of the SMMUs that cover the SATA controller(s) on the AMD Seattle SOC. The CCP crypto accelerator shares its SMMU with the sec
dt: amd-seattle: add description of the SATA/CCP SMMUs
Add descriptions of the SMMUs that cover the SATA controller(s) on the AMD Seattle SOC. The CCP crypto accelerator shares its SMMU with the second SATA controller, which is only enabled on B1 silicon.
Signed-off-by: Ard Biesheuvel <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]>
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| acd9208e | 03-Dec-2019 |
Ard Biesheuvel <[email protected]> |
dt: amd-seattle: fix PCIe legacy interrupt routing
The AMD Seattle SOC can be configured to expose up to 3 PCIe root ports, each of which is wired to 4 dedicated SPI wired interrupts for legacy INTx
dt: amd-seattle: fix PCIe legacy interrupt routing
The AMD Seattle SOC can be configured to expose up to 3 PCIe root ports, each of which is wired to 4 dedicated SPI wired interrupts for legacy INTx support. Update the SOC DT description to reflect this.
Fix a stale comment about the size of the MMIO64 resource window while at it.
Signed-off-by: Ard Biesheuvel <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]>
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| f179eb6b | 03-Dec-2019 |
Ard Biesheuvel <[email protected]> |
dt: amd-seattle: remove Overdrive revision A0 support
Support for AMD Seattle silicon revision A0 is no longer relevant, since we no longer have a driver for the network controller, and the PCIe on
dt: amd-seattle: remove Overdrive revision A0 support
Support for AMD Seattle silicon revision A0 is no longer relevant, since we no longer have a driver for the network controller, and the PCIe on these boards was very unreliable. So drop the DTS description of the A0 version of the overdrive board.
Signed-off-by: Ard Biesheuvel <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]>
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